 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
UPD784938 Datasheet(PDF) 60 Page - NEC |
|
|
|||||||||||||||||||||||||||||
UPD784938 Datasheet(HTML) 60 Page - NEC |
|
|
60 / 733 page  CHAPTER 2 PIN FUNCTIONS 60 Preliminary User’s Manual U13987EJ1V0UM00 (10) P100 to P107 (Port 10) ... 3-state input/output Port 10 is an 8-bit input/output port with an output latch. Input/output can be specified in 1-bit units by setting the port 10 mode register (PM10). Each pin incorporates a software programmable pull-up resistor. P105 and P107 can be set in the N-ch open-drain mode. P105 to P107 pins also function as the serial input/output pin by the port 10 mode control register (PMC10). When RESET is input, port 10 is set as an input port (output high-impedance state), and the output latch contents are undefined. (11) ASTB (Address Strobe)/CLKOUT (Clock Output) ... Output This pin outputs the timing signal that latches address information externally in order to access an external address. It also operates as the pin that supplies the clock to an external device. (12) X1, X2 (Crystal) The internal clock oscillation crystal connection pins. When the clock is supplied externally, it is input to the X1 pin. Usually signal with the inverse phase of the X1 pin signal phase is input to the X2 pin (Refer to 4.3.1 Clock oscillator). (13) RESET (Reset) ... Input Active-low reset input (14) AVREF1 A/D converter reference voltage input pin (15) AVDD A/D converter power supply pin. This should be made at the same potential as the VDD pin. (16) AVSS A/D converter GND pin. This should be made at the same potential as the VSS pin. (17) VDD Positive power supply pins. All VDD pins should be connected to the positive power supply. (18) VSS GND potential pins. All VSS pins should be connected to the ground. (19) XT1 and XT2 These pins connect a crystal for watch clock oscillation. (20) PWM0 and PWM1 These pins function as PWM output pins when so specified by the PWM control register (PWMC). (21) RX IEBus data input pin (22) TX IEBus data output pin (23) REGC This pin connects a capacitor for stabilizing the regulator output. Supply a voltage same as VDD to this pin when the regulator is stopped (refer to Figure 5-1. Regulator Peripherals Block Diagram). |
Similar Part No. - UPD784938 |
|
Similar Description - UPD784938 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
