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UPD784938 Datasheet(PDF) 58 Page - NEC

Part # UPD784938
Description  16-Bit Single-Chip Microcontrollers
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD784938 Datasheet(HTML) 58 Page - NEC

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CHAPTER 2 PIN FUNCTIONS
58
Preliminary User’s Manual U13987EJ1V0UM00
(ii)
TxD (Transmit Data) /SO1 (Serial Output 1)
TxD is the asynchronous serial interface serial data output pin.
SO1 is the serial data output pin (in 3-wire serial I/O1 mode).
(iii) SCK0 (Serial Clock 0)
SCK0 is the clocked serial interface serial clock input/output pin (in 3-wire serial I/O 0 mode).
(iv) SO0 (Serial Output 0)
SO0 is the serial data output pin (in 3-wire serial I/O 0 mode).
(v)
TO0 to TO3 (Timer Output)
The timer output pins.
(5) P40 to P47 (Port 4) ... 3-state input/output
Port 4 is an 8-bit input/output port with an output latch. Input/output can be specified in 1-bit units by setting the port 4 mode
register (PM4). Each pin incorporates a software programmable pull-up resistor. This port has direct LED drive capability.
Port 4 also functions as the time division address/data bus (AD0 to AD7) by the memory expansion mode register (MM)
when external memory or I/Os are expanded.
When RESET is input, port 4 is set as an input port (output high-impedance state), and the output latch contents are
undefined.
(6) P50 to P57 (Port 5) ... 3-state input/output
Port 5 is an 8-bit input/output port with an output latch. Input/output can be specified in 1-bit units by setting the port 5 mode
register (PM5). Each pin incorporates a software programmable pull-up resistor. This port has direct LED drive capability.
In addition, P50 to P57 can be selected by means of the memory expansion mode register (MM) in 2-bit units as pins that
function as the address bus (A8 to A15) when external memory or I/Os are expanded.
When RESET is input, port 5 is set as an input port (output high-impedance state), and the output latch contents are
undefined.
(7) P60 to P67 (Port 6) ... 3-state input/output
Port 6 is an 8-bit input/output port with an output latch. P60 to P67 incorporate a software programmable pull-up resistor.
In addition to its function as a port, port 6 also has various alternate-function control signal pin functions, as shown in Table
2-4. Operations as control pins are performed by the respective function operations.
When RESET is input, P60 to P67 are set as input port pins (output high-impedance state), and the output latch contents
are undefined.
Table 2-4. Port 6 Operation Modes
Pin Name
Port Mode
Control Signal Input/Output Mode
Operation to Operate as Control Pin
P60 to P63
Input/output ports
A16 to A19 output
Specified in 2-bit units by bits MM3 to MM0 of the MM
P64
RD output
External memory expansion mode is specified by bits MM3
P65
WR output
to MM0 of the MM
P66
WAIT input
Specified by setting bits PWn1 & PWn0 (n = 0 to 7) of the
PWC1 & PWC2 and P66 to input mode
HLDRQ input
Bus hold enabled by the HLDE bit of the HLDM
P67
HLDAK output
REFRQ output
Set (to 1) the RFEN bit of the RFM


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