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UPD784938 Datasheet(PDF) 53 Page - NEC |
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UPD784938 Datasheet(HTML) 53 Page - NEC |
53 / 733 page ![]() CHAPTER 2 PIN FUNCTIONS 53 Preliminary User’s Manual U13987EJ1V0UM00 (2) Non-port pins (1/2) Pin Name Input/Output Alternate Function Function TO0/TO3 Output P34 to P37 Timer output CI Input P23/INTP2 Count clock input to timer/event counter 2 RxD Input P30/SI1 Serial data input (UART0) RxD2 P13/SI2 Serial data input (UART2) TxD Output P31/SO1 Serial data output (UART0) TxD2 P14/SO2 Serial data output (UART2) ASCK Input P25/INTP4/SCK1 Baud rate clock input (UART0) ASCK2 P12/SCK2 Baud rate clock input (UART2) SI0 Input P27 Serial data input (3-wire serial I/O0) SI1 P30/RxD Serial data input (3-wire serial I/O1) SI2 P13/RxD2 Serial data input (3-wire serial I/O2) SI3 P106 Serial data input (3-wire serial I/O3) SO0 Output P33 Serial data output (3-wire serial I/O0) SO1 P31/TxD Serial data output (3-wire serial I/O1) SO2 P14/TxD2 Serial data output (3-wire serial I/O2) SO3 P107 Serial data output (3-wire serial I/O3) SCK0 Input/output P32 Serial clock input/output (3-wire serial I/O0) SCK1 P25/INTP4/ASCK Serial clock input/output (3-wire serial I/O1) SCK2 P12/ASCK2 Serial clock input/output (3-wire serial I/O2) SCK3 P105 Serial clock input/output (3-wire serial I/O3) NMI Input P20 External interrupt requests — INTP0 P21 • Count clock input to timer/event counter 1 • CR11 or CR12 capture trigger signal INTP1 P22 • Count clock input to timer/event counter 2 • CR22 capture trigger signal INTP2 P23/CI • Count clock input to timer/event counter 2 • CR21 capture trigger signal INTP3 P24 • Count clock input to timer/event counter 0 • CR02 capture trigger signal INTP4 P25/ASCK0/SCK1 — INTP5 P26 A/D converter conversion start trigger input AD0 to AD7 Input/output P40 to P47 Time division address/data bus (external memory connection) A8 to A15 Output P50 to P57 Upper address bus (external memory connection) A16 to A19 Output P60 to P63 Upper address with address extension (external memory connection) RD Output P64 External memory read strobe WR Output P65 External memory write strobe WAIT Input P66/HLDRQ Wait insertion REFRQ Output P67/HLDAK External pseudo-static memory refresh pulse output HLDRQ Input P66/WAIT Bus hold request input HLDAK Output P67/REFRQ Bus hold response output |
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Similar Description - UPD784938 |
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