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UPD784938 Datasheet(PDF) 32 Page - NEC |
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UPD784938 Datasheet(HTML) 32 Page - NEC |
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32 / 733 page  32 Preliminary User’s Manual U13987EJ1V0UM00 20-22 Unit Status Register (USR) Format ............................................................................................................ 492 20-23 Broadcasting Communication Flag Operation Example ............................................................................ 493 20-24 Interrupt Status Register (ISR) Format ....................................................................................................... 494 20-25 Slave Status Register (SSR) Format .......................................................................................................... 498 20-26 Success Count Register (SCR) Format ...................................................................................................... 499 20-27 Communication Count Register (CCR) Format .......................................................................................... 499 20-28 Configuration of Interrupt Control Block ..................................................................................................... 500 21-1 Clock Output Function Configuration .......................................................................................................... 511 21-2 Clock Output Mode Register (CLOM) Format ............................................................................................ 513 21-3 Clock Output Operation Timing ................................................................................................................... 514 21-4 One-Bit Output Port Operation .................................................................................................................... 515 22-1 External Interrupt Mode Register 0 (INTM0) Format ................................................................................. 518 22-2 External Interrupt Mode Register 1 (INTM1) Format ................................................................................. 519 22-3 Sampling Clock Selection Register (SCS0) Format ................................................................................... 520 22-4 Edge Detection for Pins P20, P25, and P26 .............................................................................................. 521 22-5 P21 Pin Edge Detection .............................................................................................................................. 522 22-6 Edge Detection for Pins P22 to P24 ........................................................................................................... 523 23-1 Interrupt Control Registers ( ××ICn) ............................................................................................................. 534 23-2 Interrupt Mask Register (MK0, MK1) Format ............................................................................................. 538 23-3 In-Service Priority Register (ISPR) Format ................................................................................................ 540 23-4 Interrupt Mode Control Register (IMC) Format .......................................................................................... 541 23-5 Watchdog Timer Mode Register (WDM) Format ........................................................................................ 542 23-6 Program Status Word (PSWL) Format ....................................................................................................... 543 23-7 Context Switching Operation by Execution of a BRKCS Instruction ......................................................... 544 23-8 Return from BRKCS Instruction Software Interrupt (RETCSB instruction operation) .............................. 545 23-9 Non-Maskable Interrupt Request Acknowledgment Operations ................................................................ 547 23-10 Interrupt Acknowledgment Processing Algorithm ....................................................................................... 551 23-11 Context Switching Operation by Generation of an Interrupt Request ....................................................... 552 23-12 Return from Interrupt that Uses Context Switching by Means of RETCS Instruction .............................. 553 23-13 Examples of Servicing when Another Interrupt Request is Generated During Interrupt Service ............ 555 23-14 Examples of Servicing of Simultaneously Generated Interrupts ............................................................... 558 23-15 Differences in Level 3 Interrupt Acknowledgment According to IMC Register Setting ............................. 559 23-16 Differences between Vectored Interrupt and Macro Service Processing .................................................. 560 23-17 Macro Service Processing Sequence ......................................................................................................... 563 23-18 Operation at End of Macro Service when VCIE = 0 .................................................................................. 564 23-19 Operation at End of Macro Service when VCIE = 1 .................................................................................. 565 23-20 Macro Service Control Word Format .......................................................................................................... 566 23-21 Macro Service Mode Register Format ........................................................................................................ 567 LIST OF FIGURES (10/12) Figure No. Title Page |
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