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UPD70F3201 Datasheet(PDF) 19 Page - NEC |
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UPD70F3201 Datasheet(HTML) 19 Page - NEC |
19 / 98 page Preliminary Product Information U15436EJ1V0PM 19 µµµµPD703201, 703201Y, 703204, 703204Y, 70F3201, 70F3201Y, 70F3204, 70F3204Y Table 1-1. Types of Pin I/O Circuits (2/2) Pin Alternate Function I/O Circuit Type Recommended Connection of Unused Pins PCM3 HLDRQ [PCM4] – [PCM5] – PCS0 to PCS3 CS0 to CS3 [PCS4 to PCS7] – PCT0, PCT1 WR0, WR1 [PCT2, PCT3] – PCT4 RD PCT5 – PCT6 ASTB PCT7 – PDH0 to PDH5, [PDH6, PDH7] A16 to A21, [A22, A23] PDL0 to PDL4 AD0 to AD4 PDL5 AD5/FLMD1 Note 1 PDL6 to PDL15 AD6 to AD15 5 Input: Independently connect to EVDD or EVSS via a resistor. Output: Leave open. AVDD –– – AVREF0 – – Connect to AVSS via a resistor. AVREF1 – – Connect to AVSS via a resistor. AVSS –– – EVDD –– – EVSS –– – FLMD0 Note 1 –– – IC Note 2 –– – RESET – 2 – VDD –– – VDDBU – – – VSS –– – VSSBU – – – X1 – – – X2 – – – XT1 – 16 Connect to VSSBU via a resistor. XT2 – 16 Leave open. Notes 1. Applies to the µPD70F3201, 70F3201Y, 70F3204, and 70F3204Y only. 2. Applies to the µPD703201, 703201Y, 703204, and 703204Y only. Remark Pins in brackets ([ ]) are only for the V850ES/SA3. |
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