UPD70F3201 datasheet(81/98 Pages) NEC

Part #	UPD70F3201

Description	32-BIT SINGLE-CHIP MICROCONTROLLERS

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Manufacturer	NEC [NEC]

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Preliminary Product Information U15436EJ1V0PM

81

µµµµPD703201, 703201Y, 703204, 703204Y, 70F3201, 70F3201Y, 70F3204, 70F3204Y

(c) Write cycle (CLKOUT asynchronous): In separate bus mode

(TA = –40 to +85

°°°°C, VDD = AVDD = EVDD = VDDBU = 2.2 to 2.7 V, VSS = AVSS = EVSS = VSSBU = 0 V, CL = 50 pF)

Parameter

Symbol

Conditions

MIN.

MAX.

Unit

Address setup time (to WRm

↓)tSAW

<72>

T – 15

ns

Address hold time (from WRm

↑)tHAW

<73>

0.5T – 10

ns

WRm low-level width

tWWRL

<74>

(0.5 + n) T – 10

ns

Data output time from WRm

↓

tDOSDW

<75>

–5ns

Data setup time (to WRm

↑)tSOSDW

<76>

(0.5 + n) T – 10

ns

Data hold time (from WRm

↑)tHOSDW

<77>

0.5T – 10

ns

Data setup time (to address)

tSAOD

<78>

T – 25

ns

tSWRWT1

<79>

20

ns

WAIT setup time (to WRm

↓)

tSWRWT2

<80>

nT – 20

ns

tHWRWT1

<81>

0

ns

WAIT hold time (from WRm

↓)

tHWRWT2

<82>

nT

ns

tSAWT1

<83>

T – 20

ns

WAIT setup time (to address)

tSAWT2

<84>

(1 + n) T – 20

ns

tHAWT1

<85>

T

ns

WAIT hold time (from address)

tHAWT2

<86>

(1 + n) T

ns

Remarks 1.

m = 0, 1

2.

T = 1/fCPU (fCPU: CPU operation clock frequency)

3.

n: Number of wait clocks inserted in bus cycle

The sampling timing changes when a programmable wait is inserted.

4.

The values in the above specifications are the values for when clocks with a 1:1 duty ratio are input

from X1.

(d) Write cycle (CLKOUT synchronous): In separate bus mode

(TA = –40 to +85

°°°°C, VDD = AVDD = EVDD = VDDBU = 2.2 to 2.7 V, VSS = AVSS = EVSS = VSSBU = 0 V, CL = 50 pF)

Parameter

Symbol

Conditions

MIN.

MAX.

Unit

Delay time from CLKOUT

↑ to address, CS tDKSA

<87>

0

19

ns

Delay time from CLKOUT

↑ to data output

tDKSD

<88>

0

19

ns

Delay time from CLKOUT

↑↓ to WRm

tDKSW

<89>

0

19

ns

WAIT setup time (to CLKOUT

↑)tSWTK

<90>

15

ns

WAIT hold time (from CLKOUT

↑)tHKWT

<91>

5

ns

Remarks 1.

m = 0, 1

2.

The values in the above specifications are the values for when clocks with a 1:1 duty ratio are input

from X1.

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