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UPD70F3201 Datasheet(PDF) 70 Page - NEC |
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UPD70F3201 Datasheet(HTML) 70 Page - NEC |
70 / 98 page Preliminary Product Information U15436EJ1V0PM 70 µµµµPD703201, 703201Y, 703204, 703204Y, 70F3201, 70F3201Y, 70F3204, 70F3204Y Data Retention Characteristics (1) In STOP mode (TA = –40 to +85°C, VSS = AVSS = EVSS = VSSBU = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Data retention voltage VDDDR1 STOP mode 1.8 2.7 V Data retention current IDDDR1 VDD = AVDD = EVDD = VDDBU = VDDDR1 T.B.D. T.B.D. µA Supply voltage rise time tRVD1 200 µs Supply voltage fall time tFVD1 200 µs Supply voltage hold time (from STOP mode setting) tHVD1 0ms STOP release signal input time tDREL1 0ms Data retention high-level input voltage VIHDR1 All input ports VIHn VDDDR1 V Data retention low-level input voltage VILDR1 All input ports 0 VILn V Remark n = 1 to 5 VDD Setting STOP mode tHVD1 tFVD1 RESET (input) NMI, INTP0 to INTP6 (input) NMI, INTP0 to INTP6 (input) (when STOP mode is released at rising edge) tRVD1 tDREL1 VDDDR1 VIHDR1 VILDR1 VIHDR1 Caution Shifting to STOP mode and restoring from STOP mode must be performed at VDD = 2.3 V min. (fCLK = 17 MHz) and VDD = 2.2 V min. (fCLK = 13.5 MHz), respectively. |
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