UPD70F3201 datasheet(58/98 Pages) NEC

Part #	UPD70F3201

Description	32-BIT SINGLE-CHIP MICROCONTROLLERS

Download	98 Pages

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Manufacturer	NEC [NEC]

Direct Link	http://www.nec.com/

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58 / 98 page

Preliminary Product Information U15436EJ1V0PM

58

µµµµPD703201, 703201Y, 703204, 703204Y, 70F3201, 70F3201Y, 70F3204, 70F3204Y

(2/6)

Execution

Clock

Flags

Mnemonic

Operand

Opcode

Operation

ir

l

CY OV

S

Z SAT

DBTRAP

1111100001000000

DBPC

←PC+2 (restored PC)

DBPSW

←PSW

PSW.NP

←1

PSW.EP

←1

PSW.ID

←1

PC

←00000060H

33

3

DI

0000011111100000

0000000101100000

PSW.ID

←11

1

imm5,list12

00000 1100 1iiiiiL

LLLLLLLLLLL00000

sp

←sp+zero-extend(imm5 logically shift left by 2)

GR[reg in list12]

←Load-memory(sp,Word)

sp

←sp+4

repeat 2 steps above until all regs in list12 is loaded

n+1

Note4

n+1

Note4

n+1

Note4

DISPOSE

imm5,list12,[reg1]

00000 1100 1iiiiiL

LLLLLLLLLLLRRRRR

Note 5

sp

←sp+zero-extend(imm5 logically shift left by 2)

R[reg in list12]

←Load-memory(sp,Word)

sp

←sp+4

repeat 2 steps above until all regs in list12 is loaded

PC

←GR[reg1]

n+3

Note4

n+3

Note4

n+3

Note4

DIV

reg1,reg2,reg3

rrrrr 1111 11RRRRR

wwwww01011000000

GR[reg2]

←GR[reg2}÷GR[reg1]

GR[reg3]

←GR[reg2]%GR[reg1]

35

reg1,reg2

rrrrr 0000 10RRRRR

GR[reg2]

←GR[reg2]÷GR[reg1]Note6

35

××

×

DIVH

reg1,reg2,reg3

rrrrr 1111 11RRRRR

wwwww01010000000

GR[reg2]

←GR[reg2]÷GR[reg1]Note6

GR[reg3]

←GR[reg2]%GR[reg1]

35

××

×

DIVHU

reg1,reg2,reg3

rrrrr 1111 11RRRRR

wwwww01010000010

GR[reg2]

←GR[reg2]÷GR[reg1]Note6

GR[reg3]

←GR[reg2]%GR[reg1]

34

××

×

DIVU

reg1,reg2,reg3

rrrrr 1111 11RRRRR

wwwww01011000010

GR[reg2]

←GR[reg2]÷GR[reg1]

GR[reg3]

←GR[reg2]%GR[reg1]

34

××

×

EI

1000011111100000

0000000101100000

PSW.ID

←01

1

HALT

0000011111100000

0000000100100000

Stop

1

HSW

reg2,reg3

rr rrr1 1111 1000 00

wwwww01101000100

GR[reg3]

←GR[reg2](15 : 0) ll GR[reg2] (31 : 16)

1

×

0

××

JARL

disp22,reg2

rr rrr1 1110 dddd dd

ddddddddddddddd0

Note 7

GR[reg2]

←PC+4

PC

←PC+sign-extend(disp22)

22

2

JMP

[reg1]

00000000011RRRRR

PC

←GR[reg1]

3

JR

disp22

0000011110dddddd

ddddddddddddddd0

Note 7

PC

←PC+sign-extend(disp22)

2

LD.B

disp16[reg1],reg2

rrrrr 1110 00RRRRR

dddddddddddddddd

adr

←GR[reg1]+sign-extend(disp16)

GR[reg2]

←sign-extend(Load-memory(adr,Byte))

11

Note

11

LD.BU

disp16[reg1],reg2

rrrrr 1111 0bRRRRR

dddddddddddddd1

Notes 8, 10

adr

←GR[reg1]+sign-extend(disp16)

GR[reg2]

←zero-extend(Load-memory(adr,Byte))

11

Note

11

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UPD70F3201 Datasheet(PDF) 58 Page - NEC

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