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UPD70F3201 Datasheet(PDF) 36 Page - NEC |
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UPD70F3201 Datasheet(HTML) 36 Page - NEC |
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36 / 98 page  Preliminary Product Information U15436EJ1V0PM 36 µµµµPD703201, 703201Y, 703204, 703204Y, 70F3201, 70F3201Y, 70F3204, 70F3204Y •••• Backup mode overview The V850ES/SA2 and V850ES/SA3 are put in backup mode by stopping supplying power other than the backup power supply (VDDBU) in STOP mode. The backup power supply supplies power only to the subclock oscillator, real-time counter, and internal RAM, as shown in the figure below. Other on-chip functions including the CPU cannot operate since the power supply is stopped. Power supply for backup Power supply for operation Connect to VSS in backup mode Backup power supply status flag (BPSF) RAM Real-time counter Subclock oscillator Main clock oscillator Peripheral function ROM CPU I/O function A/D converter D/A converter VDDBU VDD AVDD EVDD VSSBU VSS AVSS EVSS In backup mode, subclock oscillator operation, real-time counter count operation, and internal RAM data retention are enabled. If the voltage is lower than the data retention voltage in backup mode, a backup power supply status flag (BPSF) is set and that internal RAM retention data can be detected as invalid. When this flag is set, the real-time counter and the RAM should be initialized at reset start. BPSF clear BPSF confirmed (set → initialization) BPSF cleared STOP execution Normal operation Backup mode Oscillation stabilization Normal operation (VDDBU is lower than data retention voltage) STOP mode Reset mode Reset mode Backup power supply status flag (BPSF) CPU status VDDBU VDD, EVDD, AVDD RESET (input) |
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Similar Description - UPD70F3201 |
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