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UPD70F3201 Datasheet(PDF) 18 Page - NEC |
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UPD70F3201 Datasheet(HTML) 18 Page - NEC |
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18 / 98 page  Preliminary Product Information U15436EJ1V0PM 18 µµµµPD703201, 703201Y, 703204, 703204Y, 70F3201, 70F3201Y, 70F3204, 70F3204Y 1.3 Pin I/O Circuits and Recommended Connection of Unused Pins The I/O circuit type of each pin and recommended connection of unused pins are show in Table 1-1. For the schematic circuit diagram of each type, refer to Figure 1-1. Table 1-1. Types of Pin I/O Circuits (1/2) Pin Alternate Function I/O Circuit Type Recommended Connection of Unused Pins P00 NMI P01 to P04 INTP0/TI2 to INTP3/TI5 P05 INTP4 5-W [P20] [SI4] 5-W [P21] [SO4] 10-E [P22] [SCK4] 10-F P30 SI1/RXD0 5-W P31 SO1/TXD0 10-E P32 SCK1 10-F P40 SI0 5-W P41 SO0/SDA Note 10-F P42 SCK0/SCL Note 10-F P43 INTP00/TI0/TCLR0 P44 INTP01/TO0 P45 INTP10/TI1/TCLR1 P46 INTP11/TO1 5-W Input: Independently connect to EVDD or EVSS via a resistor. Output: Leave open. P70 to P711, [P712 to P715] ANI0 to ANI15 9 P80, P81 ANO0, ANO1 34 Independently connect to AVDD or AVSS via a resistor. P90, P91 A0, A1 5-A P92, P93 A2/INTP5, A3/INTP6 5-W P94 to P97 A4/TO2 to A7/TO5 5-A P98 A8/RXD1 5-W P99 A9/TXD1 5-A P910 A10/SI2 5-W P911 A11/SO2 10-E P912 A12/SCK2 10-F P913 A13/SI3 5-W P914 A14/SO3 10-E P915 A15/SCK3 10-F [PCD1 to PCD3] – PCM0 WAIT PCM1 CLKOUT PCM2 HLDAK 5 Input: Independently connect to EVDD or EVSS via a resistor. Output: Leave open. Note Applies to the µPD703201Y, 703204Y, 70F3201Y, and 70F3204Y only. Remark Pins in brackets ([ ]) are only for the V850ES/SA3. |
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