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TM124FBK32 Datasheet(PDF) 8 Page - Texas Instruments |
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TM124FBK32 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 11 page TM124FBK32, TM124FBK32S 1048576 BY 32-BIT TM248GBK32, TM248GBK32S 2097152 BY 32-BIT DYNAMIC RAM MODULES SMMS664A – DECEMBER 1995 – REVISED JUNE 1996 8 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 switching characteristics over recommended ranges of supply voltage and operating free-air temperature PARAMETER ’124FBK32-60 ’248GBK32-60 ’124FBK32-70 ’248GBK32-70 ’124FBK32-80 ’248GBK32-80 UNIT MIN MAX MIN MAX MIN MAX tAA Access time from column address 30 35 40 ns tCAC Access time from CAS low 15 18 20 ns tRAC Access time from RAS low 60 70 80 ns tCPA Access time from column precharge 35 40 45 ns tCLZ CAS to output in the low-impedance state 0 0 0 ns tREZ Output disable time after RAS high (see Note 6) 3 15 3 18 3 20 ns tWEZ Output disable time after W low (see Note 6) 3 15 3 18 3 20 ns NOTE 6: tREZ and tWEZ are specified when the output is no longer driven. EDO timing requirements over recommended ranges of supply voltage and operating free-air temperature ’124FBK32-60 ’248GBK32-60 ’124FBK32-70 ’248GBK32-70 ’124FBK32-80 ’248GBK32-80 UNIT MIN MAX MIN MAX MIN MAX tHPC Cycle time, EDO page-mode read or write 25 30 35 ns tPRWC Cycle time, EDO read-write 80 90 100 ns tCSH Hold time, CAS from RAS 50 55 60 ns tDOH Hold time, output from CAS 3 3 3 ns tCAS Pulse duration, CAS 10 10 000 12 10 000 15 10 000 ns tWPE Pulse duration, W (output disable only) 5 5 5 ns tCP Precharge time, CAS 5 5 5 ns |
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