TM124FBK32, TM124FBK32S 1048576 BY 32-BIT

TM248GBK32, TM248GBK32S 2097152 BY 32-BIT

DYNAMIC RAM MODULES

SMMS664A – DECEMBER 1995 – REVISED JUNE 1996

7

POST OFFICE BOX 1443

electrical characteristics over full ranges of recommended operating conditions (unless otherwise

noted)

PARAMETER

TEST CONDITIONS

’248GBK32-60

’248GBK32-70

’248GBK32-80

UNIT

PARAMETER

TEST CONDITIONS

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

VOH High-level output voltage

IOH = – 5 mA

2.4

2.4

2.4

V

VOL

Low-level output voltage

IOL = 4.2 mA

0.4

0.4

0.4

V

II

Input current (leakage)

VI = 0 to 6.5 V,

VCC = 5 V,

All other pins = 0 to VCC

±20

±20

±20

µA

IO

Output current (leakage)

VO = 0 to VCC,VCC = 5.5 V,

CAS high

±20

±20

±20

µA

ICC1

Read- or write-cycle current

(see Note 3)

Minimum cycle,

VCC = 5.5 V

856

736

656

mA

ICC1 Standby current

After one memory cycle,

RAS and CAS high,

VIH = 2.4 V (TTL)

32

32

32

mA

ICC1 Standby current

After one memory cycle,

RAS and CAS high,

VIH = VCC – 0.2 V (CMOS)

16

16

16

mA

ICC3

Average refresh current

(RAS-only or CBR)

(see Note 3)

Minimum cycle,

VCC = 5.5 V,

RAS cycling,

CAS high (RAS-only),

RAS low after CAS low (CBR)

1680

1440

1280

mA

ICC4

Average EDO current

(see Note 4)

tPC = minimum,

VCC = 5.5 V,

RAS low, CAS cycling

736

656

576

mA

NOTES:

3. Measured with a maximum of one address change while RAS = VIL.

4. Measured with a maximum of one address change while CAS = VIH.

capacitance over recommended ranges of supply voltage and operating free-air temperature

f = 1 MHz (see Note 5)

’124FBK32

’248GBK32

UNIT

MIN

MAX

MIN

MAX

UNIT

Ci(A)

Input capacitance, address inputs

40

80

pF

Ci(R)

Input capacitance, RAS

28

28

pF

Ci(C)

Input capacitance, CAS

14

28

pF

Ci(W)

Input capacitance, write-enable input

56

112

pF

Co(DQ) Output capacitance on DQ pins

7

14

pF

NOTE 5: VCC equal to 5 V ± 0.5 V and the bias on pins under test is 0 V.