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UPD780204 Datasheet(PDF) 56 Page - NEC |
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UPD780204 Datasheet(HTML) 56 Page - NEC |
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56 / 418 page  CHAPTER 3 CPU ARCHITECTURE 56 User’s Manual U11302EJ4V0UM Figure 3-7. Data Memory Addressing ( µPD780205 and µPD780205A) 0000H Internal ROM 40960 x 8 bits Internal high-speed RAM 1024 x 8 bits Buffer RAM 64 x 8 bits Reserved A000H 9FFFH FFFFH General-purpose registers 32 x 8 bits Special-function registers (SFRs) 256 x 8 bits FB00H FAFFH FAC0H FABFH FEE0H FEDFH FF00H FEFFH VFD display RAM 80 x 8 bits FA80H FA7FH FA30H FA2FH Reserved FF20H FF1FH Direct addressing Register indirect addressing Based addressing Based indexed addressing FE20H FE1FH SFR addressing Register addressing Short direct addressing |
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