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UPD780204 Datasheet(PDF) 20 Page - NEC |
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UPD780204 Datasheet(HTML) 20 Page - NEC |
20 / 418 page 20 User’s Manual U11302EJ4V0UM LIST OF FIGURES (5/6) Figure No. Title Page 15-1 VFD Controller Operation Timing in Display Mode 1 (DSPM05 = 0) ........................................... 300 15-2 VFD Controller/Driver Block Diagram ............................................................................................ 302 15-3 Format of Display Mode Register 0 ............................................................................................... 305 15-4 Format of Display Mode Register 1 ............................................................................................... 307 15-5 Format of Display Mode Register 2 ............................................................................................... 308 15-6 Cut Width of Segment/Digit Signal ................................................................................................. 310 15-7 VFD Controller Display Start Timing .............................................................................................. 310 15-8 Selection of Display Mode .............................................................................................................. 311 15-9 Pin Configuration for 14-Segment Display ..................................................................................... 312 15-10 Relationship Between Display Data Memory Contents and Segment Output ............................. 313 15-11 Light Leakage due to Short Blanking Time .................................................................................... 315 15-12 Light Leakage due to CSG ............................................................................................................... 316 15-13 Waveform of Light Leakage due to CSG ......................................................................................... 316 15-14 Display Data Memory Configuration and Segment Data Reading Order (Segment Type) ............................................................................................................................... 318 15-15 Relationship Between Display Data Memory Contents and Segment Outputs in 10-Segment x 11-Digit Display Mode ........................................................................................ 319 15-16 Display Data Memory Configuration and Segment Data Reading Order (Dot Type) .................. 320 15-17 Relationship Between Display Data Memory Contents and Segment Outputs in 35-Segment x 16-Digit Display Mode ........................................................................................ 321 15-18 Display Data Memory Configuration and Data Reading Order (Display Mode 2) ....................... 322 15-19 Segment Connection Example ....................................................................................................... 323 15-20 Grid Driving Timing ......................................................................................................................... 324 15-21 Data Memory Status in 23-Segment x 5-Grid Display Mode ........................................................ 325 15-22 Allowable Total Power Dissipation PT (TA = –40 to +85 °C) .......................................................... 326 15-23 Relationship Between Display Data Memory Contents and Segment Outputs in 10-Segment x 11-Digit Display Mode ........................................................................................ 328 15-24 Relationship Between Display Data Memory Contents and Segment Outputs in 35-Segment x 16-Digit Display Mode ........................................................................................ 331 15-25 Grid Driving Timing ......................................................................................................................... 333 15-26 Data Memory Status in 23-Segment x 5-Grid Display Mode ........................................................ 334 16-1 Basic Configuration of Interrupt Function ...................................................................................... 337 16-2 Format of Interrupt Request Flag Register .................................................................................... 340 16-3 Format of Interrupt Mask Flag Register ......................................................................................... 341 16-4 Format of Priority Specification Flag Register ............................................................................... 342 16-5 Format of External Interrupt Mode Register .................................................................................. 343 16-6 Format of Sampling Clock Select Register .................................................................................... 344 16-7 Noise Eliminator I/O Timing (When Rising Edge Is Detected) ..................................................... 345 16-8 Format of Program Status Word .................................................................................................... 346 16-9 Non-Maskable Interrupt Request Acknowledgment Flowchart ..................................................... 348 16-10 Non-Maskable Interrupt Request Acknowledgment Timing .......................................................... 348 16-11 Non-Maskable Interrupt Request Acknowledgment Operation ..................................................... 349 |
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