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HL7588 Datasheet(PDF) 31 Page - List of Unclassifed Manufacturers

Part # HL7588
Description  Product Technical Specification
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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HL7588 Datasheet(HTML) 31 Page - List of Unclassifed Manufacturers

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4116369
Rev 9.0
September 04, 2017
31
Product Technical Specification
Detailed Interface Specifications
Pad #
Signal Name*
I/O*
Description
8
UART1_DCD**
O
Signal data connection in progress
9
UART1_DSR**
O
Signal UART interface is ON
*
According to PC view.
**
This signal is not available on the HL7548.
3.10. POWER-ON Signal (PWR_ON_N)
A low-level signal should be provided to switch the AirPrime HL7548 and HL7588 module ON.
It is internally connected to the permanent 1.8V supply regulator inside the HL7548 or HL7588 via a
pull-up resistor. Once VBAT is supplied to the HL7548 or HL7588 module, this 1.8V supply regulator
will be enabled and so the PWR_ON_N signal is by default at high level.
The PWR_ON_N signal’s characteristics are listed in the table below.
Table 18. PWR_ON_N Electrical Characteristics
Parameter
Minimum
Typical
Maximum
Input Voltage-Low (V)
-
0.51
Input Voltage-High (V)
1.33
-
2.2
Power-up period (ms) from PWR_ON_N falling edge
2000
-
-
PWR_ON_N assertion time (ms)
25
Note:
As PWR_ON_N is internally pulled up with 100kΩ, an open collector or open drain transistor must
be used for ignition.
VGPIO is an output from the module that can be used to check if the module is active.
When VGPIO = 0V, the module is OFF
When VGPIO = 1.8V, the module is ON (it can be in idle, communication or sleep mode)
Note:
PWR_ON_N signal cannot be used to power the module off. To power the module off, use AT
command AT+CPWROFF.
3.11. Reset Signal (RESET_IN_N)
To reset the module, a low-level pulse must be sent on the RESET_IN_N pad for 20ms. This action
will immediately restart the AirPrime HL7548 or HL7588 module with the PWR_ON_N signal at low
level. (If the PWR_ON_N signal is at high level, the module will be powered off.) As RESET_IN_N is
internally pulled up, an open collector or open drain transistor should be used to control this signal.
The RESET_IN_N signal will reset the registers of the CPU and reset the RAM memory as well, for
the next power on.
Note:
As RESET_IN_N is referenced to the VRTC (200kΩ pull-up resistor to VRTC 1.8V) an open
collector or open drain transistor has to be used to control this signal.


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