SARA-N2 datasheet(17/30 Pages) U-BLOX

Part #	SARA-N2

Description	Power-optimized NB-IoT (LTE Cat NB1) modules

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Manufacturer	U-BLOX [u-blox AG]

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SARA-N2 series - Data Sheet

UBX-15025564 - R16

Electrical specification

Page 17 of 30

4.2.5 RESET_N pin

Parameter

Min.

Typical

Max.

Unit

Remarks

Internal supply for

External Reset Input Signal

VCC

V

Module supply input (VCC)

Schmitt Trigger Low to High

Threshold Point (VT+)

0.52*VCC

V

Schmitt Trigger High to Low

Threshold Point (VT-)

0.36*VCC

V

Pull-up resistance

78

k

Internal active pull-up to VCC

Low-level input current

-10

µ

A

RESET_N low-level time

500

ns

Low time to reset the module

Table 15: RESET_N pin characteristics

4.2.6 SIM interface pins

Parameter

Min.

Typ.

Max.

Unit

Remarks

Internal supply for SIM domain

1.8

V

Generic Digital Interface supply output (VSIM)

Low-level input

-0.1*VSIM

0.2*VSIM

V

High-level input

0.7*VSIM

1.1*VSIM

V

Low-level output

0.0

V

High-level output

VSIM

V

Internal pull-up on SIM_IO

4.7

k

Internal pull-up to VSIM

Clock frequency on SIM_CLK

4.8

MHz

Input / Output leakage current

±

10

µ

A

Table 16: SIM pins characteristics

4.2.7 UART interface pins

Parameter

Min.

Typ.

Max.

Unit

Remarks

Internal supply for UART domain

VCC

V

Module supply input (VCC)

Low-level input

-0.1*VCC

0.2*VCC

V

High-level input

0.7*VCC

1.1*VCC

V

Low-level output

0.0

V

High-level output

VCC

V

Input / Output leakage current

±

10

µ

A

Table 17: UART pins characteristics

4.2.8 Generic Digital Interface pins

Parameter

Min.

Typ.

Max.

Unit

Remarks

Internal supply for GDI domain

1.8

V

Generic Digital Interface supply output (V_INT)

Low-level input

-0.1*V_INT

0.2*V_INT

V

High-level input

0.7*V_INT

1.1*V_INT

V

Low-level output

0.0

V

High-level output

V_INT

V

Input / Output leakage current

±

10

µ

A

Table 18: Generic Digital Interface (GDI) pins characteristics

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