MC74VHCT08A

VHC Data – Advanced CMOS Logic

DL203 — Rev 1

3

MOTOROLA

Sb l

P

T

C

di i

TA = 25°C

TA ≤ 85°C

TA ≤ 125°C

Ui

Symbol

Parameter

Test Conditions

Min

Typ

Max

Min

Max

Max

Max

Unit

tPLH,

tPHL

Maximum Propagation

Delay,

Input A or B to Y

VCC = 3.0 ± 0.3V CL = 15pF

CL = 50pF

6.2

8.7

8.8

12.3

10.5

14.0

14.0

17.5

ns

Input A or B to Y

VCC = 5.0 ± 0.5V

CL = 15pF

CL = 50pF

4.3

5.8

5.9

7.9

7.0

9.0

9.0

11.0

Cin

Maximum Input Capacitance

4

10

10

10

pF

C

PDi

i

i

C

i

(N

1 )

Typical @ 25

°C, VCC = 5.0V

F

CPD

Power Dissipation Capacitance (Note 1.)

20

pF

1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.

dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.

Sb l

Ch

i i

TA = 25°C

Ui

Symbol

Characteristic

Typ

Max

Unit

VOLP

Quiet Output Maximum Dynamic VOL

0.3

0.8

V

VOLV

Quiet Output Minimum Dynamic VOL

– 0.3

– 0.8

V

VIHD

Minimum High Level Dynamic Input Voltage

3.5

V

VILD

Maximum Low Level Dynamic Input Voltage

1.5

V

Figure 1. Switching Waveforms

Y

A or B

1.5V

tPLH

tPHL

GND

3.0V

1.5V

CL*

*Includes all probe and jig capacitance

TEST

POINT

DEVICE

UNDER

TEST

OUTPUT

Figure 2. Test Circuit

VOH

VOL