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INA229-Q1

SLYS024 – MAY 2020

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Copyright © 2020, Texas Instruments Incorporated

The device shunt voltage measurements, bus voltage, and temperature measurements can be read through the

VSHUNT, VBUS, and DIETEMP registers, respectively. The digital output in VSHUNT and VBUS registers is 20-

bits. The shunt voltage measurement can be positive or negative due to bidirectional currents in the system,

therefore the data value in VSHUNT can be positive or negative. The VBUS data value is always positive. The

output data can be directly converted into voltage by multiplying the digital value to its respective resolution size.

The digital output in the DIETEMP register is 16-bit and can be directly converted in °C by multiplying by the

above resolution size. This output value can also be positive or negative.

Further the device provides the flexibility to report calculated current in Amperes, power in Watts, charge in

Coulombs and energy in Joules as described in Current Calculation.

7.3.3 High Precision Delta-Sigma ADC

The integrated ADC is a high-performance, low-offset, low-drift, delta-sigma ADC designed to support

bidirectional current flow at the shunt voltage measurement channel. The measured inputs are multiplexed

through the high-voltage input multiplexer to the ADC inputs. The ADC architecture enables lower drift

measurement across temperature and consistent offset measurements across the common-mode voltage,

temperature and power supply variations. In current sensing applications a low-offset ADC is preferred in order to

provide a near 0-V offset voltage which maximizes the useful dynamic range of the system.

ADC conversion time for each input can be set independently by the VSHCT, VBUSCT, and VTCT bits in

register ADCCONFIG_2, respectively, in the range of 50 µs to 4.12 ms. Furthermore, a sample averaging

function in the range of 1x to 1024x is implemented and can be selected by the AVG bits in ADCCONFIG_2

register. The sample conversion time and the averaging are a part of the integrated digital filter described in Low

Latency Digital Filter.

The INA229-Q1 can measure the shunt voltage, bus voltage, and die temperature, or a combination of any

based on the selected MODE bits setting in the ADCCONFIG_2 register. This permits selecting modes to convert

only the shunt voltage or bus voltage to further allow the user to configure the monitoring function to fit the

specific application requirements. When no averaging is selected, once an ADC conversion is completed, the

converted values are independently updated in their corresponding registers where they can be read through the

digital interface at the time of input conversion end. The conversion time of each input depends on the selected

conversion-time setting (VSHCT, VBUSCT and VTCT) for each input, respectively. As soon as an input is

converted, the following input begins, and the individual input channel sample rate depends on the conversion

time and number of inputs enabled for conversion. When averaging is used, the intermediate values are

subsequently stored in an accumulator, and the conversion sequence repeats until the number of averages is

reached. After all of the averaging has been completed, the final values are updated in the corresponding

registers that can then be read. These values remain in the data output registers until they are replaced by the

next fully completed conversion results. In this case, reading the data output registers does not affect a

conversion in progress.

The ADC has two conversion modes—continuous and triggered—set by the MODE bits in ADCCONFIG_2

register. In continuous-conversion mode, the ADC will continuously convert the input measurements and update

the output registers as described above in an indefinite loop. In triggered-conversion mode, the ADC will convert

the input measurements as described above, after which the ADC will halt until another single-shot trigger is

generated by writing to the MODE bits. If the mode does not change and the device is kept in any of the

triggered convert modes, writing the MODE bits will trigger a single-shot conversion. Although the device can be

read at any time, and the data from the last conversion remain available, the Conversion Ready flag (CNVRF bit

in DIAG_ALRT register) is provided to help coordinate triggered conversions. This bit is set after all conversion

and averaging is completed.

The Conversion Ready flag (CNVRF) clears under these conditions:

•

Writing to the ADCCONFIG_2 register (except for selecting shut-down mode); or

•

Reading the DIAG_ALRT Register