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EL2021 Datasheet(PDF) 3 Page - Intersil Corporation

Part # EL2021
Description  Monolithic Pin Driver
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

EL2021 Datasheet(HTML) 3 Page - Intersil Corporation

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3
AC Electrical Specifications
DC test conditions apply except where noted. For AC tests, RL = 1k, CL = 200pF. Delay times are
measured from OE or Data crossing 2.5V, VCH = 5V, VCL = 0.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNITS
SR+
+Slew Rate
Data L to H, Output from 0.5V to 4.5V, VSR = 1V
VSR = 3V
80
150
100
240
120
360
V/µs
V/µs
SR-
-Slew Rate
Data H to L, Output from 4.5V to 0.5V, VSR = 1V
VSR = 3V
-80
-150
-100
-240
-120
-360
V/µs
V/µs
SRSYM
Slew Rate
Symmetry
-10
-20
10
20
%
%
TPD
Propagation Delay
Data L to H, Output to 0.2V, VSR = 2.5V
Data H to L, Output to 4.8V, VSR = 2.5V
6.5
6.5
9
9
11.5
11.5
ns
ns
TS
Settling Time
VSR = 5V, Data L to H, Output 4.5V to 5V±0.2V
VSR = 5V, Data H to L, Output 0.5V to ±0.2V
30
30
ns
ns
OS
Overshoot
VSR = 1V, Data L to H or H to L
VSR = 1V, OE H to L, Data = L, RL to 5V
VSR = 1V, OE H to L, Data = H, RL to 0V
-300
-300
-300
300
300
300
mV
mV
mV
TPDA
Propagation Delay,
High-Z to Active
VSR = 2.5V, OE H to L, CL = 50pF
RL to 5V, Data = L, Output to 3.5V
RL to 0V, Data = H, Output to 1.5V
50
50
ns
ns
TPDH
Propagation Delay,
Active to High-Z
VSR = 2.5V, OE L to H, CL = 50pF,
Data = L, RL to 5V, Output to 0.5V
Data = H, RL to 0V, Output to 4.5V
50
50
ns
ns
Pin Description Table
PIN #
NAME
DESCRIPTION
1
GND
System ground.
2
E
Enable control input. A logic low allows normal operation; a logic high puts the device into
power down mode. No output levels are defined in powerdown nor does the output behave
as a high impedance.
3
OE
Output Enable input. A logic low sets the output to low-impedance driver mode; a logic high
places the output into a high-impedance state.
4VCL
Lower analog control input. When Data = OE = E = L, the VCL level is output as VOUT
(assuming VCL < VCH).
5
B-
System power supply. The EL2021 uses this pin as a negative output current monitor connection.
Little current is drawn from this pin, transient or static.
6ISENSE-
Negative output current monitor input.
7
V-
Negative power supply. Because all negative output drive currents come from this pin
(as much as 60mA transiently), good bypassing is essential.
8
Drive-
Output to external pnp transistor base.
9VOUT
High-current input and output, depending on OE.
10
Drive+
Output to external npn transistor base.
11
Sense Out
Logic output which signals that a high + or - output current is flowing.
12
V+
Positive power supply. Like V-, it should be well bypassed.
13
ISENSE+
Positive output current monitor input.
14
B+
System power supply, similar to B-.
15
VCH
Higher analog control input. When Data = H and OE = E = L, the VCH level is output as
VOUT (assuming VCH > VCL).
16
VSR
Slew rate control input. A 1V level on this pin causes the output to slew at 100V/µs, 0.5V
causes a slew rate of 50V/µs, etc.
17
Data
Output level control input. This pin digitally selects VCL or VCH as the output voltage
when OE = E = L.
18
N/C
Not Connected.
SR+
()-SR-
()
SR+
()+SR-
()
--------------------------------------
VSR
1V
=
VSR
2V
=
EL2021


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