7

Also important is circuit-board layout. At the EL6205's

operating frequencies, even the ground plane is not low-

impedance. High frequency current will create voltage drops

in the ground plane. Figure 3 shows the output current loop.

For the current loop, the current flows through the supply

bypass-capacitor. The ground end of the bypass thus should

be connected directly to the EL6205 ground pin and laser

ground. A long ground return path will cause the bypass

capacitor currents to generate voltage drops in the ground

plane of the circuit board, and other components (such as

the ground return of the load should be considered, as noisy

and other grounded components should not connect to this

path. Slotting the ground plane around the load's return will

reduce adjacent grounded components from seeing the

noise.

Power Dissipation

It is important to calculate the maximum junction

temperature for the application to determine if the conditions

need to be modified for the oscillator to remain in the safe

operating area.

The maximum power dissipation allowed in a package is

determined according to:

where:

The supply current of the EL6205 depends on the peak-to-

peak output current and the operating frequency which are

predicted approximately by the following equations:

The power dissipation can be calculated from the following

equation:

voltage of the laser diode. Figure 4 provides a convenient

way to see if the device may overheat. The maximum safe

power dissipation can be found graphically, based on the

ambient temperature and JEDEC standard single layer PCB.

For flex circuits, the

the device's power derating curve. To ensure proper

operation, it is important to observe the recommended

derating curve shown in Figure 4.

FIGURE 3. OUTPUT CURRENT LOOP

Sourcing Current Loop

Supply

Bypass

LOAD

GND

(8-Pin

Package)

P

DMAX

T

Θ

JA

---------------------------------------------

=

I

SUP1

35mA

1k

Ω

×

R

FREQ

----------------------------------

0.5mA

+

=

I

SUP2

50

I

IN

0.5

×

×

=

P

D

V

SUP

I

SUP1

V

(

I

SUP2

×

+

×

=

FIGURE 4. PACKAGE POWER DISSIPATION vs

AMBIENT TEMPERATURE

JEDEC JESD51-7 HIGH EFFECTIVE

THERMAL CONDUCTIVITY TEST BOARD

0.5

0.45

0.3

0.2

0.15

0.1

0.05

0

0

25

50

75

100

150

AMBIENT TEMPERATURE (°C)

85

435mW

SOT23-5/6

0.4

0.25

0.35

125

JEDEC JESD51-3 LOW EFFECTIVE

THERMAL CONDUCTIVITY TEST BOARD

0.45

0.4

0.25

0.15

0.1

0.05

0

0

255075

100

150

AMBIENT TEMPERATURE (°C)

85

391mW

θ

25

6°C

/W

SO

T2

3-5

-6

0.35

0.2

0.3

125

EL6205