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AT90S8535 Datasheet(PDF) 42 Page - ATMEL Corporation |
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AT90S8535 Datasheet(HTML) 42 Page - ATMEL Corporation |
42 / 127 page 42 AT90S/LS8535 1041H–11/01 Note: X = A In PWM mode, the Timer Overflow Flag1 (TOV1) is set when the counter advances from $0000. Timer Overflow Interrupt1 operates exactly as in normal Timer/Counter mode, i.e., it is executed when TOV1 is set, provided that Timer Overflow Interrupt1 and global interrupts are enabled. This also applies to the Timer Output Compare1 flags and interrupts. 8-bit Timer/Counter2 Figure 34 shows the block diagram for Timer/Counter2. Figure 34. Timer/Counter2 Block Diagram The 8-bit Timer/Counter2 can select clock source from PCK2 or prescaled PCK2. It can also be stopped as described in the specification for the Timer/Counter Control Register (TCCR2). The diffe rent statu s flag s (Overflow an d Com pare M atch) a re foun d in th e Timer/Counter Interrupt Flag Register (TIFR). Control signals are found in the 10 TOP H 1 1 $0000 H 11 TOP L Table 16. PWM Outputs OCR1X = $0000 or TOP COM1X1 COM1X0 OCR1X Output OC1X 8-BIT DATA BUS 8-BIT ASYNCH T/C2 DATA BUS ASYNCH. STATUS REGISTER (ASSR) TIMER INT. FLAG REGISTER (TIFR) TIMER/COUNTER2 (TCNT2) SYNCH UNIT 8-BIT COMPARATOR OUTPUT COMPARE REGISTER2 (OCR2) TIMER INT. MASK REGISTER (TIMSK) 0 0 0 7 7 7 T/C CLK SOURCE UP/DOWN T/C CLEAR CONTROL LOGIC TOSC1 CK PCK2 T/C2 OVER- FLOW IRQ T/C2 COMPARE MATCH IRQ T/C2 CONTROL REGISTER (TCCR2) CK |
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