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AT90S8535 Datasheet(PDF) 14 Page - ATMEL Corporation |
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AT90S8535 Datasheet(HTML) 14 Page - ATMEL Corporation |
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14 / 127 page  14 AT90S/LS8535 1041H–11/01 Data Indirect with Pre- decrement Figure 15. Data Indirect Addressing with Pre-decrement The X-, Y-, or the Z-register is decremented before the operation. Operand address is the decremented contents of the X-, Y-, or the Z-register. Data Indirect with Post- increment Figure 16. Data Indirect Addressing with Post-increment The X-, Y-, or the Z-register is incremented after the operation. Operand address is the content of the X-, Y-, or the Z-register prior to incrementing. Constant Addressing Using the LPM Instruction Figure 17. Code Memory Constant Addressing Constant byte address is specified by the Z-register contents. The 15 MSBs select word address (0 - 4K), the LSB selects low byte if cleared (LSB = 0) or high byte if set (LSB = 1). Data Space $0000 $025F X, Y OR Z - REGISTER 0 15 -1 Data Space $0000 $025F X, Y OR Z - REGISTER 0 15 1 $FFF |
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