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AT90S8535 Datasheet(PDF) 11 Page - ATMEL Corporation |
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AT90S8535 Datasheet(HTML) 11 Page - ATMEL Corporation |
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11 / 127 page  11 AT90S/LS8535 1041H–11/01 SRAM Data Memory Figure 8 shows how the AT90S8535 SRAM memory is organized. Figure 8. SRAM Organization The lower 608 data memory locations address the Register file, the I/O memory and the internal data SRAM. The first 96 locations address the Register file + I/O memory, and the next 512 locations address the internal data SRAM. The five different addressing modes for the data memory cover: Direct, Indirect with Dis- placement, Indirect, Indirect with Pre-decrement and Indirect with Post-increment. In the register file, registers R26 to R31 feature the indirect addressing pointer registers. The direct addressing reaches the entire data space. The Indirect with Displacement mode features 63 address locations reached from the base address given by the Y- or Z-registers. When using register indirect addressing modes with automatic pre-decrement and post- increment, the address registers X, Y, and Z are decremented and incremented. The 32 general-purpose working registers, 64 I/O registers and the 512 bytes of internal data SRAM in the AT90S8535 are all accessible through all these addressing modes. See the next section for a detailed description of the different addressing modes. Register File R0 R1 R2 R29 R30 R31 I/O Registers $00 $01 $02 ... $3D $3E $3F ... $0000 $0001 $0002 $001D $001E $001F $0020 $0021 $0022 ... $005D $005E $005F ... Data Address Space $0060 $0061 $025E $025F ... Internal SRAM |
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