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X24C45 Datasheet(PDF) 2 Page - Intersil Corporation |
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X24C45 Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 12 page 2 FN8104.0 June 1, 2005 PIN DESCRIPTIONS Chip Enable (CE) The Chip Enable input must be HIGH to enable all read/write operations. CE must remain HIGH following a Read or Write command until the data transfer is complete. CE LOW places the X24C45 in the low power standby mode and resets the instruction register. Therefore, CE must be brought LOW after the comple- tion of an operation in order to reset the instruction reg- ister in preparation for the next command. Serial Clock (SK) The Serial Clock input is used to clock all data into and out of the device. Data In (DI) Data In is the serial data input. Data Out (DO) Data Out is the serial data output. It is in the high impedance state except during data output cycles in response to a READ instruction. AUTOSTORE Output (AS) AS is an open drain output which, when asserted indi- cates VCC has fallen below the AUTOSTORE thresh- old (VASTH). AS may be wire-ORed with multiple open drain outputs and used as an interrupt input to a micro- controller or as an input to a low power reset circuit. RECALL RECALL LOW will initiate an internal transfer of data from EEPROM to the RAM array. PIN CONFIGURATION PIN NAMES Symbol Description CE Chip Enable SK Serial Clock DI Serial Data In DO Serial Data Out RECALL Recall Input AS AUTOSTORE Oput VCC +5V VSS Ground CE SK DI DO 1 2 3 4 8 7 6 5 VCC AS RECALL VSS X24C45 DIP/SOIC X24C45 |
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