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M5M5V108CFP-70HI Datasheet(PDF) 4 Page - Mitsubishi Electric Semiconductor

Part # M5M5V108CFP-70HI
Description  1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M5M5V108CFP-70HI Datasheet(HTML) 4 Page - Mitsubishi Electric Semiconductor

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MITSUBISHI LSIs
M5M5V108CFP,VP,RV,KV,KR -70HI, -10HI,
-70XI, -10XI
1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM
MITSUBISHI
ELECTRIC
(2) READ CYCLE
(3) WRITE CYCLE
Symbol
Parameter
tCR
Read cycle time
Address access time
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Symbol
Parameter
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max
Min
Min
Max
Limits
ta(S1)
ta(S2)
ta(OE)
tdis(S1)
tdis(S2)
tdis(OE)
ten(S1)
ten(S2)
ten(OE)
tV(A)
ta(A)
Limits
-10HI,-10XI
AC ELECTRICAL CHARACTERISTICS (Ta=– 40~85°C, unless otherwise noted )
(1) MEASUREMENT CONDITIONS
Chip select 1 access time
Chip select 2 access time
Output enable access time
Output disable time after S1 high
Output disable time after S2 low
Output disable time after OE high
Output enable time after S1 low
Output enable time after S2 high
Output enable time after OE low
Data valid time after address
70
70
70
35
25
25
25
70
10
10
5
10
100
100
100
50
35
35
35
100
10
10
5
10
Write cycle time
Write pulse width
Address setup time
Address setup time with respect to W
Chip select 1 setup time
Chip select 2 setup time
Data setup time
Data hold time
Write recovery time
Output disable time from W low
Output disable time from OE high
Output enable time from W high
Output enable time from OE low
35
35
100
75
0
85
85
85
40
0
0
5
5
25
25
70
55
0
65
65
65
30
0
0
5
5
VCC
2.7~3.6V
Input pulse level
VIH=2.2V,VIL=0.4V
Input rise and fall time
5ns
Reference level
VOH=VOL=1.5V
Output loads
Fig.1, CL=30pF
CL=5pF
(for ten,tdis)
Transition is measured ± 500mV from steady
state voltage. (for ten,tdis)
.................................
...............
.............
.....
...................
including
scope and JIG
1TTL
CL
DQ
Fig.1 Output load
Min
Max
-70HI,-70XI
Max
Min
tCW
tw(W)
tsu(A)
tsu(A-WH)
tsu(S1)
tsu(S2)
tsu(D)
th(D)
trec(W)
tdis(W)
tdis(OE)
ten(W)
ten(OE)
-10HI,-10XI
-70HI,-70XI
4


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