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TL16C750E Datasheet(PDF) 8 Page - Texas Instruments |
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TL16C750E Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 59 page  8 TL16C750E SLLSF10 – DECEMBER 2019 www.ti.com Product Folder Links: TL16C750E Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Timing Requirements (continued) TA = -40°C to 105°C, VCC = 1.8 V to 5 V ±10% (unless otherwise noted) LIMITS UNIT 1.8 V 2.5 V 3.3 V 5 V MIN MAX MIN MAX MIN MAX MIN MAX t6s Address setup time 65 45 30 20 ns t6h Address hold time See Figure 2 and Figure 4 15 10 7 5 ns t7w IOR strobe width See Figure 2 and Figure 4 85 70 50 40 ns t9w Read cycle delay See Figure 4 85 70 60 50 ns t12d Delay from IOR to data See Figure 4 90 55 35 25 ns t12h Data disable time 45 30 20 15 ns t13w IOW strobe width See Figure 2 85 70 50 40 ns t15w Write cycle delay See Figure 2 85 70 60 50 ns t16s Data setup time See Figure 2 70 50 30 20 ns t16h Data hold time See Figure 2 35 25 15 10 ns t17d Delay from IOW to output 50-pF load, see Figure 6 80 50 35 25 ns t18d Delay to set interrupt from MODEM input 50-pF load, see Figure 6 120 80 50 35 ns t19d Delay to reset interrupt from IOR 50-pF load 100 65 40 30 ns t20d Delay from stop to set interrupt See Figure 8 1 1 1 1 baudrate t21d Delay from IOR to reset interrupt 50-pF load, see Figure 8 100 65 40 30 ns t22d Delay from stop to interrupt See Figure 14 1 1 1 1 baudrate t23d Delay from initial IOW reset to transmit start See Figure 14 8 24 8 24 8 24 8 24 baudrate t24d Delay from IOW to reset interrupt See Figure 14 90 60 35 25 ns t25d Delay from stop to set RXRDY See Figure 10 and Figure 12 1 1 1 1 baudrate t26d Delay from IOR to reset RXRDY See Figure 10 and Figure 12 100 65 40 30 ns t27d Delay from IOW to set TXRDY See Figure 16 and 80 50 35 25 ns t28d Delay from start to reset TXRDY See Figure 16 and 16 16 16 16 baudrate No IOR (MODE = GND) tRESET Reset pulse width 200 200 200 200 ns CP CP clock period 63 42 20 20 ns t3w Oscillator or clock speed 16 24 48 48 MHz t6s Address setup time 70 45 30 20 ns t6h Address hold time See Figure 3 and Figure 5 15 10 7 5 ns t9w Read cycle delay See Figure 5 85 70 60 50 ns t12d Delay from CS to data See Figure 5 95 65 40 25 ns t12h Data disable time 45 30 20 15 ns t13w IOW strobe width See Figure 3 85 70 50 40 ns t15w Write cycle delay See Figure 3 85 70 60 50 ns t16s Data setup time See Figure 3 75 50 30 25 ns t16h Data hold time See Figure 3 80 50 35 25 ns t17d Delay from CS to output 50-pF load, see Figure 6 80 50 35 25 ns t18d Delay to set interrupt from MODEM input 50-pF load, see Figure 6 120 75 45 35 ns t19d Delay to reset interrupt from CS 50-pF load 95 65 40 30 ns t20d Delay from stop to set interrupt See Figure 8 1 1 1 1 baudrate t21d Delay from IOR to reset interrupt 50-pF load, see Figure 8 85 55 40 30 ns t22d Delay from stop to interrupt See Figure 14 1 1 1 1 baudrate t23d Delay from initial CS reset to transmit start See Figure 14 8 24 8 24 8 24 8 24 baudrate t24d Delay from IOW to reset interrupt See Figure 14 90 60 40 25 ns t25d Delay from stop to set RXRDY See Figure 10 and Figure 12 1 1 1 1 baudrate t26d Delay from CS to reset RXRDY See Figure 10 and Figure 12 95 60 35 25 ns |
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