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TL16C750E Datasheet(PDF) 36 Page - Texas Instruments |
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TL16C750E Datasheet(HTML) 36 Page - Texas Instruments |
36 / 59 page ![]() TL16C750E SLLSF10 – DECEMBER 2019 www.ti.com 36 Product Folder Links: TL16C750E Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Table 8. TL16C750E Internal Registers(1) (2) (continued) ADDRESS [A2:A0] REGISTER R/W (3) ACCESS CONSIDERATION BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 (7) This register is only accessible when EFR[4] = 1 and MCR[6] = 1 (8) This register is accessible when LCR[7] = 1, LCR ≠ 0xBF, EFR[4] = 1, MCR ≠ 0bx1x0 x1xx(9) (9) A 'x' denotes a do not care for a bit value (10) This register is accessible when any CS A-B = 0, MCR[2] = 1, and loopback MCR[4] = 0 is disabled. 1 1 0 MSR R LCR[7:0] ≠ 10111111 & none of the below conditions are true CD# 1 RI# 1 DSR# 1 CTS# 1 CD# 0 RI# 0 DSR# 0 CTS# 0 Xoff1(6) RW LCR[7:0] = 10111111 bit 7 1 bit 6 1 bit 5 1 bit 4 1 bit 3 1 bit 2 1 bit 1 1 bit 0 1 TCR(7) RW EFR[4] = 1 & MCR[6] = 1 bit 7 0 bit 6 0 bit 5 0 bit 4 0 bit 3 0 bit 2 0 bit 1 0 bit 0 0 1 1 1 SPR RW LCR[7:0] ≠ 10111111 & none of the below conditions are true bit 7 0 bit 6 0 bit 5 0 bit 4 0 bit 3 0 bit 2 0 bit 1 0 bit 0 0 Xoff2(6) RW LCR[7:0] = 10111111 bit 7 1 bit 6 1 bit 5 1 bit 4 1 bit 3 1 bit 2 1 bit 1 1 bit 0 1 TLR(7) RW EFR[4] = 1 & MCR[6] = 1 bit 7 0 bit 6 0 bit 5 0 bit 4 0 bit 3 0 bit 2 0 bit 1 0 bit 0 0 DLF(8) RW LCR[7] = 1, LCR ≠ 0xBF, EFR[4] = 1, MCR ≠ 0bx1x0 x1xx (9) bit 7 0 bit 6 0 (Reserved, RO) bit 5 0 bit 4 0 bit 3 0 bit 2 0 bit 1 0 bit 0 0 FIFORdy(10 ) R MCR[4] = 0 & MCR[2] = 1 0 0 0 RX FIFO A status 0 0 0 0 TX FIFO A status 0 |
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