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TL16C750E Datasheet(PDF) 34 Page - Texas Instruments |
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TL16C750E Datasheet(HTML) 34 Page - Texas Instruments |
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34 / 59 page  Receive Holding Divisor Latch LSB RHR DLL Interrupt Enable Divisor Latch MSB IER DLH Interrupt Identification Alternat e Function IIR AFR Line Control Enhanced Feature LCR EFR Modem Control Xon 1 word MCR Xon1 Line Stat us Xon 2 word LSR Xon2 Modem Status Xoff 1 word MSR Xoff1 Scratch Register Xoff 2 word SPR Xoff2 Transmission Control TCR Trigger Level TLR Accessible only when LCR[7] = 1 Accessible only when LCR[7:5] = 0b100 Accessible only when LCR = 0b1011 1111 (0xBF) Accessible only when EFR[4] = 1 and MCR[6] = 1 Accessible only when LCR[7] = 1, /&5 • 0xBF, EFR[4] = 1, 0&5 • 0bx1x0x1xx Fractional Divisor DLF FIFO Ready FIFO RDY Accessible only when any CS A-B = 0, MCR[2] = 1 and MCR[4] = 0 Transmit Holding Divisor Latch LSB THR DLL Interrupt Enable Divisor Latch MSB IER DLH FIFO Control Alternat e Function FCR AFR Line Control Enhanced Feature LCR EFR Modem Control Xon 1 word MCR Xon1 Xon 2 word Xon2 Xoff 1 word Xoff1 Scratch Register Xoff 2 word SPR Xoff2 Transmission Control TCR Trigger Level TLR ADDRESS [A2:A0] 000 001 010 011 100 101 110 111 READ MODE WRITE MODE Fractional Divisor DLF 34 TL16C750E SLLSF10 – DECEMBER 2019 www.ti.com Product Folder Links: TL16C750E Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 9.5 Register Maps 9.5.1 Registers Operations Each register is selected using address lines A[0], A[1], A[2], and in some cases, bits from other registers. The programming combinations for register selection are shown in Figure 30. NOTE: MCR[7:5], FCR[5:4], and IER[7:4] can only be modified when EFR[4] is set. Figure 30. Register Map – Read and Write Properties Table 8 lists and describes the TL16C750E internal registers. |
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