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TL16C750E Datasheet(PDF) 30 Page - Texas Instruments |
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TL16C750E Datasheet(HTML) 30 Page - Texas Instruments |
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30 / 59 page  DLH = TRUNC(Divisor) >> 8 DLL = TRUNC(Divisor) & 0x00FF DLF = ROUND( (Divisor-TRUNC(Divisor) ) x 128) Divisor = (XTAL crystal input frequency / prescaler) / (desired baud rate × baud divider) Driver XTAL1 External Clock Optional Clock Output Optional Driver XTAL2 V CC Oscillator Clock to Baud Generator Logic XTAL1 XTAL2 V CC Oscillator Clock to Baud Generator Logic C1 R p RX2 Crystal C2 Copyright © 2017, Texas Instruments Incorporated 30 TL16C750E SLLSF10 – DECEMBER 2019 www.ti.com Product Folder Links: TL16C750E Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Figure 27 shows the crystal clock circuit reference. A. For crystal with fundamental frequency from 1 to 24 MHz B. For input clock frequency higher than 24 MHz, the crystal is not allowed and the oscillator must be used, because the TL16C750E internal oscillator cell can only support the crystal frequency up to 24 MHz. Figure 27. Typical Crystal Clock Circuits 9.3.14 Fractional Divisor The TL16C750E supports fractional divisors with a fractional resolution of 64 steps. This makes it possible to achieve many baud rates with a single crystal selection. The following register settings must be configured to use the fractional divider: • LCR[7] = 1 • LCR ≠ 0xBF • EFR[4] = 1 • MCR ≠ 0bx1x0x1xx NOTE A 'x' denotes a do not care value of the bit. To calculate the values necessary to put into the registers, the following functions are needed: • TRUNC(X): Truncate X, return just the integer portion of a real number. EX: TRUNC(3.14) = 3 • ROUND(X): Round X to the nearest integer. EX: ROUND(3.1) = 3 and ROUND(3.6) = 4 • >>: Bit shift towards the right operation. EX: 0x1000 >> 8 = 0x0010. Or 0b0001 0000 0000 0000 >> 8 = 0b0000 0000 0001 0000 • &: Bitwise AND function, used to mask bits. EX: 0x1234 & 0x00FF = 0x0034 and 0x8765 & 0xFF00 = 0x8700 Calculating the required divisor is calculated by Where 'baud divider' is either 8 or 16, depending on the value of DLF[7]. By default, DLF[7] = 0, which corresponds to a baud divider of 16. Once the required divisor is found, then the register values can be calculated from |
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