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TL16C750E Datasheet(PDF) 24 Page - Texas Instruments

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Part # TL16C750E
Description  TL16C750E UART with 128-Byte FIFO
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TL16C750E Datasheet(HTML) 24 Page - Texas Instruments

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UART 1
Parallel to Serial
Serial to Parallel
Xon-1 Word
Xon-2 Word
Xoff-1 Word
Xoff-2 Word
Transmit
FIFO
Serial to Parallel
Parallel to Serial
Xon-1 Word
Xon-2 Word
Xoff-1 Word
Xoff-2 Word
Receive
FIFO
Data
Xoff − Xon − Xoff
Compare
Programmed
Xon −Xoff
Characters
UART 2
24
TL16C750E
SLLSF10 – DECEMBER 2019
www.ti.com
Product Folder Links: TL16C750E
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Copyright © 2019, Texas Instruments Incorporated
Figure 23. Software Flow Control Example
9.3.7 Software Flow Control Example
Assumptions: UART1 is transmitting a large text file to UART2. Both UARTs are using software flow control with
single character Xoff (0F) and Xon (0D) tokens. Both have Xoff threshold (TCR [3:0] = 7) set to 56 and Xon
threshold (TCR[7:4] = 4) set to 32. Both have the interrupt receive threshold (TLR[7:4] = 6) set to 48.
UART1 begins transmission and sends 48 characters, at which point UART2 generates an interrupt to its
processor to service the RCV FIFO, but assumes the interrupt latency is fairly long. UART1 continues sending
characters until a total of 56 characters have been sent. At this time UART2 transmits a 0F to UART1, informing
UART1 to halt transmission. UART1 likely sends the 57th character while UART2 is sending the Xoff character.
Now, UART2 is serviced and the processor reads enough data out of the RCV FIFO that the level drops to 32.
UART2 now sends a 0D to UART1, informing UART1 to resume transmission.
NOTE
It is possible that there could be a glitch on the RXRDY pin when the Xoff2 character is
received with a parity error. A read to the LSR register shows that bit 7 is set, due to an
error in the RX FIFO.


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