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TL16C750E Datasheet(PDF) 23 Page - Texas Instruments |
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TL16C750E Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 59 page  23 TL16C750E www.ti.com SLLSF10 – DECEMBER 2019 Product Folder Links: TL16C750E Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Table 1. Software Flow Control Options EFR[3:0] BIT 3 BIT 2 BIT 1 BIT 0 TX, RX SOFTWARE FLOW CONTROLS 0 0 X X No transmit flow control 1 0 X X Transmit Xon1, Xoff1 0 1 X X Transmit Xon2, Xoff2 1 1 X X Transmit Xon1, Xon2: Xoff1, Xoff2 X X 0 0 No receive flow control X X 1 0 Receiver compares Xon1, Xoff1 X X 0 1 Receiver compares Xon2, Xoff2 1 0 1 1 Transmit Xon1, Xoff1 Receiver compares Xon1 or Xon2, Xoff1 or Xoff2 0 1 1 1 Transmit Xon2, Xoff2 Receiver compares Xon1 or Xon2, Xoff1 or Xoff2 1 1 1 1 Transmit Xon1, Xon2: Xoff1, Xoff2 Receiver compares Xon1 and Xon2: Xoff1 and Xoff2 0 0 1 1 No transmit flow control Receiver compares Xon1 and Xon2: Xoff1 and Xoff2 (1) When pairs of Xon and Xoff characters are programmed to occur sequentially, received Xon1 and Xoff1 characters is written to the RX FIFO if the subsequent character is not Xon2 and Xoff2. When software flow control operation is enabled, the TL16C750E device compares incoming data with Xoff1 and Xoff2 programmed characters (in certain cases Xoff1 and Xoff2 must be received sequentially). (1) When an Xoff character is received, transmission is halted after completing transmission of the current character. Xoff character detection also sets IIR[4] and causes INT to go high (if enabled via IER[5]). To resume transmission an Xon1 and Xon2 character must be received (in certain cases Xon1 and Xon2 must be received sequentially). When the correct Xon characters are received IIR[4] is cleared and the Xoff interrupt disappears. NOTE If a parity, framing, or break error occurs while receiving a software flow control character, this character is treated as normal data and is written to the RCV FIFO. Xoff1 and Xoff2 characters are transmitted when the RX FIFO has passed the programmed trigger level TCR[3:0]. Xon1 and Xon2 characters are transmitted when the RX FIFO reaches the trigger level programmed via TCR[7:4]. NOTE If, after an Xoff character has been sent, software flow control is disabled, the UART transmits Xon characters automatically to enable normal transmission to proceed. A feature of the TL16C750E UART design is that if the software flow combination (EFR[3:0]) changes after an Xoff has been sent, the originally programmed Xon is automatically sent. If the RX FIFO is still above the trigger level, the newly programmed Xoff1 or Xoff2 is transmitted. The transmission of Xoff and Xon follows the exact same protocol as transmission of an ordinary byte from the FIFO. This means that even if the word length is set to be 5, 6, or 7 characters, then the 5, 6, or 7 least significant bits of Xoff1, Xoff2 and Xon1, Xon2 are transmitted. The transmission of 5, 6, or 7 bits of a character is seldom done, but this functionality is included to maintain compatibility with earlier designs. It is assumed that software flow control and hardware flow control are never enabled simultaneously. Figure 23 shows a software flow control example. |
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