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TL16C750E Datasheet(PDF) 21 Page - Texas Instruments |
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TL16C750E Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 59 page  Byte N+1 Byte N Start Stop Start Start Stop RX RTS IOR 1 2 N N+1 21 TL16C750E www.ti.com SLLSF10 – DECEMBER 2019 Product Folder Links: TL16C750E Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Feature Description (continued) NOTE When writing data into the transmit FIFO, the transmission starts immediately, which shifts the first element out of the FIFO. Depending on the speed of the processor, it may be possible to get a pulse on the TXRDY pin, since the level falls below the trigger threshold. 9.3.3 Hardware Flow Control Hardware flow control is composed of auto-CTS and auto-RTS. Auto-CTS and auto-RTS can be enabled or disabled independently by programming EFR[7:6]. With auto-CTS, CTS must be active before the UART can transmit data. Auto-RTS only activates the RTS output when there is enough room in the FIFO to receive data and deactivates the RTS output when the RX FIFO is sufficiently full. The HALT and RESTORE trigger levels in the TCR determine the levels at which RTS is activated or deactivated. If both auto-CTS and auto-RTS are enabled, when RTS is connected to CTS, data transmission does not occur unless the receiver FIFO has empty space. Thus, overrun errors are eliminated during hardware flow control. If not enabled, overrun errors occur if the transmit data rate exceeds the receive FIFO servicing latency. 9.3.4 Auto-RTS Auto-RTS data flow control originates in the receiver block (see Figure 18). Figure 20 shows RTS functional timing. The receiver FIFO trigger levels used in Auto-RTS are stored in the TCR. RTS is active if the RX FIFO level is below the HALT trigger level in TCR[3:0]. When the receiver FIFO HALT trigger level is reached, RTS is deasserted. The sending device (for example, another UART) may send an additional byte after the trigger level is reached (assuming the sending UART has another byte to send) because it may not recognize the deassertion of RTS until it has begun sending the additional byte. RTS is automatically reasserted once the receiver FIFO reaches the RESUME trigger level programmed via TCR[7:4]. This reassertion allows the sending device to resume transmission. A. N = receiver FIFO trigger level B. B. The two blocks in dashed lines cover the case where an additional byte is sent as described in Auto-RTS. Figure 20. RTS Functional Timing 9.3.5 Auto-CTS The transmitter circuitry checks CTS before sending the next data byte. When CTS is active, the transmitter sends the next byte. To stop the transmitter from sending the following byte, CTS must be deasserted before the middle of the last stop bit that is currently being sent. The auto-CTS function reduces interrupts to the host system. When flow control is enabled, the CTS state changes and need not trigger host interrupts because the device automatically controls its own transmitter. Without auto-CTS, the transmitter sends any data present in the transmit FIFO and a receiver overrun error can result. Figure 21 shows CTS functional timing, and Figure 22 shows an example of autoflow control. |
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