EDS1232AATA-75L-E datasheet(41/53 Pages) ELPIDA

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EDS1232AATA-75L-E Datasheet(PDF) 41 Page - Elpida Memory

Part #	EDS1232AATA-75L-E

Description	128M bits SDRAM (4M words x 32 bits)

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Manufacturer	ELPIDA [Elpida Memory]

Direct Link	http://www.elpida.com/en

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EDS1232AATA

Data Sheet E0386E40 (Ver. 4.0)

DQM Control

The DQM mask the DQ data. The UDQM and LDQM mask the upper and lower bytes of the DQ data, respectively.

The timing of UDQM/LDQM is different during reading and writing.

Reading

When data is read, the output buffer can be controlled by DQM. By setting DQM to Low, the output buffer becomes

Low-Z, enabling data output. By setting DQM to High, the output buffer becomes High-Z, and the corresponding

data is not output. However, internal reading operations continue. The latency of DQM during reading is 2 clocks.

Writing

Input data can be masked by DQM. By setting DQM to Low, data can be written. In addition, when DQM is set to

High, the corresponding data is not written, and the previous data is held. The latency of DQM during writing is 0

clock.

CLK

out 0

out 1

lDOD = 2 Latency

out 3

DQM

High-Z

Reading

CLK

in 0

in 1

lDID = 0 Latency

in 3

DQM

Writing

Similar Part No. - EDS1232AATA-75L-E

Manufacturer	Part #	Datasheet	Description
Elpida Memory	EDS1232AATA-75L-E	644Kb / 53P	128M bits SDRAM

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