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EDS1232AATA-75L-E Datasheet(PDF) 14 Page - Elpida Memory |
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EDS1232AATA-75L-E Datasheet(HTML) 14 Page - Elpida Memory |
14 / 53 page ![]() EDS1232AATA Data Sheet E0386E40 (Ver. 4.0) 14 Self refresh entry command (/CS, /RAS, /CAS, CKE = Low, /WE = High) After the command execution, self refresh operation continues while CKE remains low. When CKE goes high, the Synchronous DRAM exits the self refresh mode. During self refresh mode, refresh interval and refresh operation are performed internally, so there is no need for external control. Before executing self refresh, all banks must be precharged. /WE /CAS /RAS /CS CKE CLK Add A10 BA0, BA1 (Bank select) Self Refresh Entry Command Burst stop command (/CS = /WE = Low, /RAS, /CAS = High) This command can stop the current burst operation. /WE /CAS /RAS /CS CKE CLK Add A10 BA0, BA1 (Bank select) H Burst Stop Command in Full Page Mode No operation (/CS = Low, /RAS, /CAS, /WE = High) This command is not an execution command. No operations begin or terminate by this command. /WE /CAS /RAS /CS CKE CLK H Add A10 BA0, BA1 (Bank select) No Operation |
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