EDD2508AKTA-5 datasheet(38/48 Pages) ELPIDA

Part #	EDD2508AKTA-5

Description	256M bits DDR SDRAM (32M words x 8 bits, DDR400)

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Manufacturer	ELPIDA [Elpida Memory]

Direct Link	http://www.elpida.com/en

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38 / 48 page

EDD2508AKTA-5

Preliminary Data Sheet E0349E60 (Ver. 6.0)

38

DM Control

DM can mask input data. By setting DM to Low, data can be written. When DM is set to High, the corresponding

data is not written, and the previous data is held. The latency between DM input and enabling/disabling mask

function is 0.

Mask

DQS

DQ

DM

t1

t2

t3

t4

t5

t6

Write mask latency = 0

DM Control

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