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EDD2508AKTA-5 Datasheet(PDF) 14 Page - Elpida Memory |
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EDD2508AKTA-5 Datasheet(HTML) 14 Page - Elpida Memory |
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14 / 48 page  EDD2508AKTA-5 Preliminary Data Sheet E0349E60 (Ver. 6.0) 14 Row address strobe and bank activate [ACT] This command activates the bank that is selected by BA0, BA1 and determines the row address (AX0 to AX12). (See Bank Select Signal Table) Precharge selected bank [PRE] This command starts precharge operation for the bank selected by BA0, BA1. (See Bank Select Signal Table) [Bank Select Signal Table] BA0 BA1 Bank 0 L L Bank 1 H L Bank 2 L H Bank 3 H H Remark: H: VIH. L: VIL. Precharge all banks [PALL] This command starts a precharge operation for all banks. Refresh [REF/SELF] This command starts a refresh operation. There are two types of refresh operation, one is auto-refresh, and another is self-refresh. For details, refer to the CKE truth table section. Mode register set/Extended mode register set [MRS/EMRS] The DDR SDRAM has the two mode registers, the mode register and the extended mode register, to defines how it works. The both mode registers are set through the address pins (the A0 to the A12, BA0 to BA1) in the mode register set cycle. For details, refer to "Mode register and extended mode register set". CKE Truth Table CKE Current state Command n – 1 n /CS /RAS /CAS /WE Address Notes Idle Auto-refresh command (REF) H H L L L H × 2 Idle Self-refresh entry (SELF) H L L L L H × 2 Idle Power down entry (PDEN) H L L H H H × H L H × × × × Self refresh Self refresh exit (SELFX) L H L H H H × L H H × × × × Power down Power down exit (PDEX) L H L H H H × L H H × × × × Remark: H: VIH. L: VIL. ×: VIH or VIL. Notes: 1. All the banks must be in IDLE before executing this command. 2. The CKE level must be kept for 1 CK cycle at least. |
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