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EDD1216AATA-5 Datasheet(PDF) 35 Page - Elpida Memory

Part # EDD1216AATA-5
Description  128M bits DDR SDRAM (8M words x 16 bits, DDR400)
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDD1216AATA-5 Datasheet(HTML) 35 Page - Elpida Memory

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EDD1216AATA-5
Data Sheet E0443E40 (Ver. 4.0)
35
A Read command to the consecutive Precharge command interval (same bank): To output all data
To complete a burst read operation and get a burst length of data, the consecutive precharge command must be
issued tRPD (= BL/ 2 cycles) after the read command is issued.
out0 out1 out2 out3
CK
/CK
DQ
DQS
Command
t1
t0
t2
t3
t4
t5
t6
t7
t8
tRPD = BL/2
READ
NOP
NOP
NOP
PRE/
PALL
READ to PRECHARGE Command Interval (same bank): To output all data (CL = 3, BL = 4)
READ to PRECHARGE Command Interval (same bank): To stop output data
A burst data output can be interrupted with a precharge command. All DQ pins and DQS pins become High-Z tHZP
(= CL) after the precharge command.
out0 out1
CK
/CK
DQ
DQS
Command
t1
t0
t2
t3
t4
t5
t6
t7
t8
High-Z
High-Z
tHZP
CL = 3
READ
NOP
NOP
PRE/PALL
READ to PRECHARGE Command Interval (same bank): To stop output data (CL = 3, BL = 2, 4, 8)


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