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EDD1216AATA-5 Datasheet(PDF) 16 Page - Elpida Memory

Part # EDD1216AATA-5
Description  128M bits DDR SDRAM (8M words x 16 bits, DDR400)
Download  48 Pages
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDD1216AATA-5 Datasheet(HTML) 16 Page - Elpida Memory

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EDD1216AATA-5
Data Sheet E0443E40 (Ver. 4.0)
16
Current state
/CS
/RAS /CAS /WE
Address
Command
Operation
Next state
Read*
6
H
×
×
×
×
DESL
NOP
Active
L
H
H
H
×
NOP
NOP
Active
L
H
H
L
×
BST
BST
Active
L
H
L
H
BA, CA, A10
READ/READA
Interrupting burst read
operation to
start new read
Active
L
H
L
L
BA, CA, A10
WRIT/WRITA
ILLEGAL*
13
—
L
L
H
H
BA, RA
ACT
ILLEGAL*
11
—
L
L
H
L
BA, A10
PRE, PALL
Interrupting burst
read operation to
start pre-charge
Precharging
L
L
L
×
×
ILLEGAL
—
Read with auto-pre-
charge*
7
H
×
×
×
×
DESL
NOP
Precharging
L
H
H
H
×
NOP
NOP
Precharging
L
H
H
L
×
BST
ILLEGAL
—
L
H
L
H
BA, CA, A10
READ/READA
ILLEGAL*
14
—
L
H
L
L
BA, CA, A10
WRIT/WRITA
ILLEGAL*
14
—
L
L
H
H
BA, RA
ACT
ILLEGAL*
11, 14
—
L
L
H
L
BA, A10
PRE, PALL
ILLEGAL*
11, 14
—
L
L
L
×
×
ILLEGAL
—
Write*
8
H
×
×
×
×
DESL
NOP
Write
recovering
L
H
H
H
×
NOP
NOP
Write
recovering
L
H
H
L
×
BST
ILLEGAL
—
L
H
L
H
BA, CA, A10
READ/READA
Interrupting burst write
operation to
start read operation.
Read/ReadA
L
H
L
L
BA, CA, A10
WRIT/WRITA
Interrupting burst write
operation to
start new write
operation.
Write/WriteA
L
L
H
H
BA, RA
ACT
ILLEGAL*
11
—
L
L
H
L
BA, A10
PRE, PALL
Interrupting write
operation to start pre-
charge.
Idle
L
L
L
×
×
ILLEGAL
—
Write recovering*
9
H
×
×
×
×
DESL
NOP
Active
L
H
H
H
×
NOP
NOP
Active
L
H
H
L
×
BST
ILLEGAL
—
L
H
L
H
BA, CA, A10
READ/READA
Starting read operation. Read/ReadA
L
H
L
L
BA, CA, A10
WRIT/WRITA
Starting new write
operation.
Write/WriteA
L
L
H
H
BA, RA
ACT
ILLEGAL*
11
—
L
L
H
L
BA, A10
PRE/PALL
ILLEGAL*
11
—
L
L
L
×
×
ILLEGAL
—


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