SDRAM 64Mb H-die (x4, x8, x16)

CMOS SDRAM

Rev. 1.3 August 2004

FUNCTIONAL BLOCK DIAGRAM

Bank Select

Data Input Register

4M x 4 / 2M x 8 / 1M x 16

4M x 4 / 2M x 8 / 1M x 16

Column Decoder

Latency & Burst Length

Programming Register

LCKE

LRAS

LCBR

LWE

LDQM

CLK

CKE

CS

RAS

CAS

WE

L(U)DQM

LWE

LDQM

DQi

CLK

ADD

LCAS

LWCBR

4M x 4 / 2M x 8 / 1M x 16

4M x 4 / 2M x 8 / 1M x 16

Timing Register

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