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CS8421-CNZ Datasheet(PDF) 35 Page - Cirrus Logic |
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CS8421-CNZ Datasheet(HTML) 35 Page - Cirrus Logic |
35 / 36 page CS8421 DS641PP1 35 11. REVISION HISTORY Release Date Changes A1 July 2004 Initial Advance Release PP1 January 2005 -Updated “Features” on page 1. -Updated “Sample Rate with other XTI clocks” on page 6. -Updated “DC Electrical Characteristics” on page 7. -Updated “Digital Input Characteristics” on page 7. -Updated “Digital Interface Specifications” on page 7 -Updated Figure 5. “Typical Connection Diagram, Master and Slave Modes” on page 10. -Added Figure 6. “Typical Connection Diagram, No External Master Clock” on page 11. -Corrected reference to bypass mode to output only data on page 12. -Added section 6.1, “Clocking” on page 15. -Updated “Master Clock” on page 17. -Updated “Time Division Multiplexing (TDM) Mode” on page 18. -Added Thermal Pad label “Pin Descriptions” on page 20. -Added Thermal Pad pin description to “QFN Pin Descriptions” on page 22. -Updated “Performance Plots” beginning on page 23. Table 6. Revision History |
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