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SSD1963 Datasheet(PDF) 73 Page - List of Unclassifed Manufacturers |
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SSD1963 Datasheet(HTML) 73 Page - List of Unclassifed Manufacturers |
73 / 93 page ![]() SSD1963 Rev 1.1 P 73/93 Jan 2010 Solomon Systech 9.66 get_dbc_th Command 0xD5 Parameters 9 D/C D7 D6 D5 D4 D3 D2 D1 D0 Hex Command 0 1 1 0 1 0 1 0 1 D5 Parameter 1 1 0 0 0 0 0 0 0 DBC_TH116 xx Parameter 2 1 DBC_TH115 DBC_TH114 DBC_TH113 DBC_TH112 DBC_TH111 DBC_TH110 DBC_TH19 DBC_TH18 xx Parameter 3 1 DBC_TH17 DBC_TH16 DBC_TH15 DBC_TH14 DBC_TH13 DBC_TH12 DBC_TH11 DBC_TH10 xx Parameter 4 1 0 0 0 0 0 0 0 DBC_TH216 xx Parameter 5 1 DBC_TH215 DBC_TH214 DBC_TH213 DBC_TH212 DBC_TH211 DBC_TH210 DBC_TH29 DBC_TH28 xx Parameter 6 1 DBC_TH27 DBC_TH26 DBC_TH25 DBC_TH24 DBC_TH23 DBC_TH22 DBC_TH21 DBC_TH20 xx Parameter 7 1 0 0 0 0 0 0 0 DBC_TH316 xx Parameter 8 1 DBC_TH315 DBC_TH314 DBC_TH313 DBC_TH312 DBC_TH311 DBC_TH310 DBC_TH39 DBC_TH38 xx Parameter 9 1 DBC_TH37 DBC_TH36 DBC_TH35 DBC_TH34 DBC_TH33 DBC_TH32 DBC_TH31 DBC_TH30 xx Description Get the threshold for each level of power saving. DBC_TH1[16] : High byte of the threshold setting for the Conservative mode of DBC. (POR = 0) DBC_TH1[15:8] : 2nd byte of the threshold setting for the Conservative mode of DBC. (POR = 00000000) DBC_TH1[7:0] : Low byte of the threshold setting for the Conservative mode of DBC. (POR = 00000000) DBC_TH2[16] : High byte of the threshold setting for the Normal mode of DBC. (POR = 0) DBC_TH2[15:8] : 2nd byte of the threshold setting for the Normal mode of DBC. (POR = 00000000) DBC_TH2[7:0] : Low byte of the threshold setting for the Normal mode of DBC. (POR = 00000000) DBC_TH3[16] : High byte of the threshold setting for the Aggressive mode of DBC. (POR = 0) DBC_TH3[15:8] : 2nd byte of the threshold setting for the Aggressive mode of DBC. (POR = 00000000) DBC_TH3[7:0] : Low byte of the threshold setting for the Aggressive mode of DBC. (POR = 00000000) 9.67 set_pll Command 0xE0 Parameters 1 D/C D7 D6 D5 D4 D3 D2 D1 D0 Hex Command 0 1 1 1 0 0 0 0 0 E0 Parameter 1 1 0 0 0 0 0 0 A1 A0 xx Description Start the PLL. Before the start, the system was operated with the crystal oscillator or clock input. A[1] : Lock PLL (POR = 0) After PLL enabled for 100us, can start to lock PLL 0 Use reference clock as system clock 1 Use PLL output as system clock A[0] : Enable PLL (POR = 0) 0 Disable PLL 1 Enable PLL |
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