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SSD1963 Datasheet(PDF) 47 Page - List of Unclassifed Manufacturers |
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SSD1963 Datasheet(HTML) 47 Page - List of Unclassifed Manufacturers |
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47 / 93 page  SSD1963 Rev 1.1 P 47/93 Jan 2010 Solomon Systech VDP[7:0] : Low byte of the vertical panel size (POR = 11011111) G[5:3] : Even line RGB sequence (POR = 000) 000 RGB 001 RBG 010 GRB 011 GBR 100 BRG 101 BGR 11x Reserved G[2:0] : Odd line RGB sequence (POR = 000) 000 RGB 001 RBG 010 GRB 011 GBR 100 BRG 101 BGR 11x Reserved 9.35 set_hori_period Command 0xB4 Parameters 8 D/C D7 D6 D5 D4 D3 D2 D1 D0 Hex Command 0 1 0 1 1 0 1 0 0 B4 Parameter 1 1 0 0 0 0 0 HT10 HT9 HT8 xx Parameter 2 1 HT7 HT6 HT5 HT4 HT3 HT2 HT1 HT0 xx Parameter 3 1 0 0 0 0 0 HPS10 HPS9 HPS8 xx Parameter 4 1 HPS7 HPS6 HPS5 HPS4 HPS3 HPS2 HPS1 HPS0 xx Parameter 5 1 0 HPW6 HPW5 HPW4 HPW3 HPW2 HPW1 HPW0 xx Parameter 6 1 0 0 0 0 0 LPS10 LPS9 LPS8 xx Parameter 7 1 LPS7 LPS6 LPS5 LPS4 LPS3 LPS2 LPS1 LPS0 xx Parameter 8 1 0 0 0 0 0 0 LPSPP1 LPSPP0 xx Description Set front porch and back porch HT[10:8] : High byte of horizontal total period (display + non-display) in pixel clock (POR = 010) HT[7:0] : Low byte of the horizontal total period (display + non-display) in pixel clock (POR = 10101111) Horizontal total period = (HT + 1) pixels HPS[10:8] : High byte of the non-display period between the start of the horizontal sync (LLINE) signal and the first display data. (POR = 000) HPS[7:0] : Low byte of the non-display period between the start of the horizontal sync (LLINE) signal and the first display data. (POR = 00100000) For TFT : Horizontal Sync Pulse Start Position = HPS pixels For Serial TFT : Horizontal Sync Pulse Start Position = HPS pixels + LPSPP subpixels HPW[6:0] : Set the horizontal sync pulse width (LLINE) in pixel clock. (POR = 0000111) Horizontal Sync Pulse Width = (HPW + 1) pixels |
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