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SSD1963 Datasheet(PDF) 45 Page - List of Unclassifed Manufacturers |
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SSD1963 Datasheet(HTML) 45 Page - List of Unclassifed Manufacturers |
45 / 93 page SSD1963 Rev 1.1 P 45/93 Jan 2010 Solomon Systech A[5] A[4] A[3] TFT FRC TFT dithering 0 0 X Disable Disable 0 1 0 Disable Enable 0 1 1 Enable Disable 1 X X Disable Disable A[2] : LSHIFT polarity (POR = 0) Set the dot clock pulse polarity. 0 Data latch in falling edge 1 Data latch in rising edge A[1] : LLINE polarity (POR = 0) Set the horizontal sync pulse polarity. 0 Active low 1 Active high A[0] : LFRAME polarity (POR = 0) Set the vertical sync pulse polarity. 0 Active low 1 Active high B[6:5] : TFT type (POR = 01) 00, 01 TFT mode 10 Serial RGB mode 11 Serial RGB+dummy mode HDP [10:8] : High byte of the horizontal panel size (POR = 010) HDP [7:0] : Low byte of the horizontal panel size (POR = 01111111) Horizontal panel size = (HDP + 1) pixels VDP [10:8] : High byte of the vertical panel size (POR = 001) VDP [7:0] : Low byte of the vertical panel size (POR = 11011111) Vertical panel size = (VDP + 1) lines G[5:3] : Even line RGB sequence for serial TFT interface (POR = 000) 000 RGB 001 RBG 010 GRB 011 GBR 100 BRG 101 BGR 11x Reserved G[2:0] : Odd line RGB sequence for serial TFT interface (POR = 000) 000 RGB 001 RBG 010 GRB 011 GBR 100 BRG 101 BGR 11x Reserved |
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