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SSD1963 Datasheet(PDF) 16 Page - List of Unclassifed Manufacturers |
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SSD1963 Datasheet(HTML) 16 Page - List of Unclassifed Manufacturers |
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16 / 93 page  Solomon Systech Jan 2010 P 16/93 Rev 1.1 SSD1963 7 FUNCTIONAL BLOCK DESCRIPTIONS 7.1 MCU Interface The MCU interface connects the MCU and SSD1963 graphics controller. The MCU interface can be configured as 6800 mode and 8080 mode by the CONF pin. By pulling the CONF pin to VSSIO, the MCU interface will be configured as 6800 mode interface. If the CONF pin is connected to VDDIO, the MCU interface will be configure in 8080 mode. 7.1.1 6800 Mode The 6800 mode MCU interface consist of CS#, D/C#, E, R/W#, D[23:0], and TE signals (Please refer to Table 6-1 for pin multiplexed with 8080 mode). This interface supports both fixed E and clock E scheme to define a read/write cycle. If the E signal is kept high and used as enable signal, the CS# signal acts as a bus clock, the data or command will be latched into the system at the rising edge of CS#. If the user wants to use the E pin as the clock pin, the CS# pin then need to be fixed to logic 0 to select the chip. Then the falling edge of the E signal will latch the data or command. For details, please refer to the timing diagram in chapter 13.2.1. 7.1.2 8080 Mode The 8080 mode MCU interface consist of CS#, D/C#, RD#, WR#, D[23:0] and TE signals (Please refer to Table 6-1 for pin multiplexed with 6800 mode). This interface use WR# to define a write cycle and RD# for read cycle. If the WR# goes low when the CS# signal is low, the data or command will be latched into the system at the rising edge of WR#. Similarly, the read cycle will start when RD# goes low and end at the rising edge of RD#. The detailed timing will show in the chapter 13.2.2. 7.1.3 Register Pin Mapping When user access the registers via the parallel MCU interface, only D[7:0] will be used regardless the width of the pixel data is. Therefore, D[23:8] will only be used to address the display data only. This provided the possibility that the pixel data format as shown in Table 7-1 can be configured by command 0xF0. 7.1.4 Pixel Data Format Both 6800 and 8080 support 8-bit, 9-bit, 16-bit, 18-bit and 24-bit data bus. Depending on the width of the data bus, the display data are packed into the data bus in different ways. |
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