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S1D13505 Datasheet(PDF) 78 Page - Epson Company |
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S1D13505 Datasheet(HTML) 78 Page - Epson Company |
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78 / 565 page  Epson Research and Development Page 73 Vancouver Design Center Hardware Functional Specification S1D13505 Issue Date: 01/02/02 X23A-A-001-14 7.3.6 FPM-DRAM Self-Refresh Timing Figure 7-21: FPM-DRAM Self-Refresh Timing Table 7-20: FPM-DRAM CBR Self-Refresh Timing Symbol Parameter Min Max Units t1 Internal memory clock 40 ns t2 RAS# precharge time (REG[22h] bits 3-2 = 00) 2.45 t1 - 1 ns RAS# precharge time (REG[22h] bits 3-2 = 01 or 10) 1.45 t1 - 1 ns t3 RAS# to CAS# precharge time (REG[22h] bits 3-2 = 00) 2 t1 ns RAS# to CAS# precharge time (REG[22h] bits 3-2 = 01 or 10) 1 t1 ns t4 CAS# setup time (CAS# before RAS# refresh) 0.45 t1 - 2 ns RAS# CAS# t3 t4 t2 Memory Clock Stopped for suspend mode Restarted for active mode t1 |
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