1-of-8 Decoder
fax id: 7013
CY54/74FCT138T
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
May 1994 – Revised March 17, 1997
1CY 54/7 4FCT138 T
Features
• Function, pinout, and drive compatible with FCT and
F logic
• FCT-C speed at 5.0 ns max. (Com’l),
FCT-A speed at 5.8 ns max. (Com’l)
• Reduced VOH (typically = 3.3V) versions of equivalent
FCT functions
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable feature
• ESD > 2000V
• Matched rise and fall times
• Fully compatible with TTL input and output logic levels
• Extended commercial range of
−40°C to +85°C
• Sink current
64 mA (Com’l),
32 mA (Mil)
Source current
32 mA (Com’l),
12 mA (Mil)
• Dual 1-of-8 decoder with enables
Functional Description
The FCT138T is a 1-of-8 decoder. The FCT138T accepts
three binary weighted inputs (A0, A1, A2) and, when enabled,
provides eight mutually exclusive active LOW outputs
(O0–O7). The FCT138T features three enable inputs, two
active LOW (E1, E2) and one active HIGH (E3).
All inputs will be HIGH unless E1 and E2 are LOW and E3 is
HIGH. This multiple enable function allows easy parallel
expansion of the device to a 1-of-32 (5 lines to 32 lines)
decoder with just four FCT138T devices and one inverter.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Pin Description
Name
Description
A
Address Inputs
E1−E2
Enable Inputs (Active LOW)
E3
Enable Input (Active HIGH)
O
Outputs
Logic Block Diagram
Pin Configurations
1
2
3
4
5
6
7
8
A1
A2
E1
E2
E3
O7
VCC
GND
FCT138T–2
Top View
4
8
9
10
11
12
76 5
15 16 17 18
3
2
1
20
13
14
19
O5
O6
NC
A1
VCC
O0
O7
GND
A0
Top View
DIP/SOIC/QSOP
LCC
NC
16
15
14
13
12
11
10
9
O4
O5
O6
O7
O0
O1
O2
O3
E1
A2
A1
A0
E2 E3
FCT138T–1
A0
O4
O5
O6
O0
O1
O2
O3
FCT138T–3
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