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S29AL008D Datasheet(PDF) 50 Page - SPANSION |
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S29AL008D Datasheet(HTML) 50 Page - SPANSION |
50 / 55 page 50 S29AL008D S29AL008D_00A3 June 16, 2005 Da t a S h ee t 2. Under worst case conditions of 90°C, VCC = 2.7 V, 1,000,000 cycles. 3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes program faster than the maximum program times listed. 4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure. 5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table 5, on page 25 for further information on command definitions. 6. The device has a guaranteed minimum erase and program cycle endurance of 1,000,000 cycles. Includes all pins except VCC. Test conditions: VCC = 3.0 V, one pin at a time. Notes: 1. Sampled, not 100% tested. 2. Test conditions TA = 25°C, f = 1.0 MHz. Table 13. Latchup Characteristics Description Min Max Input voltage with respect to VSS on all pins except I/O pins (including A9, OE#, and RESET#) –1.0 V 12.5 V Input voltage with respect to VSS on all I/O pins –1.0 V VCC + 1.0 V VCC Current –100 mA +100 mA Table 14. TSOP, SO, and BGA Pin Capacitance Parameter Symbol Parameter Description Test Setup Package Typ Max Unit CIN Input Capacitance VIN = 0 TSOP, SO 6 7.5 pF BGA 4.2 5.0 COUT Output Capacitance VOUT = 0 TSOP, SO 8.5 12 BGA 5.4 6.5 CIN2 Control Pin Capacitance VIN = 0 TSOP, SO 7.5 9 BGA 3.9 4.7 |
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