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TMP451JQDQFTQ1 Datasheet(PDF) 14 Page - Texas Instruments |
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TMP451JQDQFTQ1 Datasheet(HTML) 14 Page - Texas Instruments |
14 / 37 page ![]() Frame 1 Two-Wire Slave Address Byte Frame 2 Pointer Register Byte 1 Start By Master ACK By Device ACK By Device Frame 3 Two-Wire Slave Address Byte Frame 4 Data Byte 1 Read Register Start By Master ACK By Device NACK By Master (2) From Device 1 9 1 9 1 9 1 9 SDA SCL 0 0 1 R/W P7 P6 P5 P4 P3 P2 P1 P0 ¼ ¼ ¼ ¼ SDA (Continued) SCL (Continued) 1 0 0 1 1 0 0 (1) 1 0 0 (1) R/W D7 D6 D5 D4 D3 D2 D1 D0 Frame 1 Two-Wire Slave Address Byte Frame 2 Pointer Register Byte 1 Start By Master ACK By Device ACK By Device 1 9 1 Frame 3 Data Byte 1 ACK By Device 1 D7 SDA (Continued) SCL (Continued) D6 D5 D4 D3 D2 D1 D0 9 9 SDA SCL 0 0 1 1 0 0 (1) R/W P7 P6 P5 P4 P3 P2 P1 P0 ¼ ¼ Stop By Master 14 TMP451-Q1 SLOS877B – OCTOBER 2014 – REVISED JUNE 2019 www.ti.com Product Folder Links: TMP451-Q1 Submit Documentation Feedback Copyright © 2014–2019, Texas Instruments Incorporated Programming (continued) (1) Slave address 1001100 shown. Figure 15. Two-Wire Timing Diagram for Write Word Format (1) Slave address 1001100 shown. (2) Master should leave SDA high to terminate a single-byte read operation. Figure 16. Two-Wire Timing Diagram for Single-Byte Read Format |
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