RTL8101L datasheet(38/68 Pages) ETC1

Part #	RTL8101L

Description	REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER AND MC97 CONTROLLER WITH POWER MANAGEMENT

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38 / 68 page

RTL8101L

2003-05-28

Rev.1.3

38

1: Enable

0: Disable

A low to high transaction PCIGPIO0 will trigger the PCI interrupt.

3-2

-

Reserved

1

R/W

PCIGPIO1_PC

PCIGPIO1 Primitiveness Control:

❷

1: Set PCIGPIO1 as output pin.

0: Set PCIGPIO1 as input pin.

0

R/W

PCIGPIO0_PC

PCIGPIO0 Primitiveness Control:

❷

1: Set PCIGPIO0 as output pin.

0: Set PCIGPIO0 as input pin.

❶ The PME# only be asserted when RTL8101L is in D3 state.

❷ PCIGPIO[9:8] and PCIGPIO[1:0] are sticky bits like as PME_Status (PMCSR.15) and PME_EN (PMCSR.8) be power by

Vaux.

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