RTL8101L
2003-05-28
Rev.1.3
30
6. MC’97 Controller Register and Descriptor Descriptions
MC’97 Registers
Offset
R/W
Tag
Description
0000h
R/W
The Starting Descriptor Index for LINE1-Out
0001h
R
The Current Descriptor Index for LINE1-Out
0002h
R/W
The Last Descriptor Index for LINE1-Out
0003h
R
LINE1-Out DMA Status Register
0004h-0005h
R/W
LINE1-Out DMA Control Register
0006h-0007h
R
Residual Samples Count in Current LINE1-Out Descriptor Register
0008h-000Bh
-
Reserved
000Ch-000Fh
R/W
LINE1-Out Descriptor Base Address Register
0010h
R/W
The Starting Descriptor Index for LINE1-In
0011h
R
The Current Descriptor Index for LINE1-In
0012h
R/W
The Last Descriptor Index for LINE1-In
0013h
R
LINE1-In DMA Status Register
0014h-0015h
R/W
LINE1-In DMA Control Register
0016h-0017h
R
Residual Samples Count in Current LINE1-In Descriptor Register
0018h-001Bh
-
Reserved
001Ch-001Fh
R/W
LINE1-In Descriptor Base Address Register
0020h-0021h
R/W
AC-LINK Control register
0022h-0023h
R/W
AC-LINK Status and Index register
0024h-0025h
R/W
AC-LINK Data Port
0026h-0027h
R/W
MC97 GPIO Control Register
0028h-0029h
R
MC97 GPIO Status Register
002Ah-002Bh
R/W
Interrupt Status Register
002Ch-002Dh
R/W
PCI GPIO Setup Register (PCIGPIO)
002Eh-002Fh
R/W
PCI GPIO Status Register (PCIGPIOSR)
6.1 The Starting Descriptor Index for LINE-Out
(Offset 0000h, R/W)
Bit
R/W
Symbol
Description
7-5
-
-
Reserved
4-0
R/W
LO_SDILO
Assign the first descriptor to be run when LINE1-Out bus master starts.
6.2 The Current Descriptor Index for LINE-Out
(Offset 0001h, RO)
Bit
R/W
Symbol
Description
7-5
-
-
Reserved
4-0
R
LO_CDILO
Indicates the current descriptor been running.
6.3 The Last Descriptor Index for LINE-Out
(Offset 0002h, R/W)
Bit
R/W
Symbol
Description
7-5
-
-
Reserved
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